Pass eco flow based on reduced timing scope timer
Modifying a circuit includes: obtaining timing information of the circuit, wherein the timing information includes timing information pertaining to a critical path of the circuit; determining a scope associated with the critical path, the scope including a subset of the circuit; and performing a fix based at least in part on physical information associated with the circuit to improve timing of the scope.
1. A system for modifying a circuit, comprising:
one or more processors configured to:
obtain timing information of the circuit, wherein the timing information includes timing information pertaining to a critical path of the circuit;
determine a scope associated with the critical path, wherein the scope includes:
a first set of one or more logic instances in the critical paths;
a second set of one or more logic instances required to correctly analyze signal propagation to guarantee an expected timing result for the critical path;
a third set of one or more logic instances that are coupled to the critical path through cross-coupling capacitance; and
a fourth set of one or more logic instances external to the critical path and directly coupled to one or more outputs of a logical instance on the critical path such that the fourth set of one or more logical instances contribute to one or more external loads of the critical path; and
perform a fix based at least in part on physical information associated with the circuit to improve timing of the scope; and
one or more memories coupled to the one or more processors, configured to provide the one or more processors with instructions.
2. The system of claim 1 , wherein the timing information is obtained from a separate timing analysis process.
3. The system of claim 1 , wherein the critical path includes a path with a timing violation.
4. The system of claim 1 , wherein the second set of one or more logical instances and the third set of one or more logical instances include external logic instances that affect timing of the critical path.
5. The system of claim 1 , wherein the physical information includes route information and placement information.
6. The system of claim 1 , wherein to perform the fix is further based at least in part on logical information associated with the circuit.
7. The system of claim 1 , wherein the one or more processors are further configured to perform timing analysis on the scope, including to compute timing of the scope and to calibrate a computed result of the computed timing of the scope to conform to a separate timing analysis process that generated the timing information.
8. The system of claim 1 , wherein to perform the fix based at least in part on the physical information associated with the circuit to improve timing of the scope includes to:
access scope information, timing information, and physical information;
determine a candidate fix for the scope;
determine feasibility of the candidate fix based on the physical information; and
accept the candidate fix in the event that the candidate fix is deemed to be feasible.
9. The system of claim 8 , wherein the candidate fix includes a logical fix, a physical fix, or both.
10. A method of modifying a circuit, comprising:
obtaining timing information of the circuit, wherein the timing information includes timing information pertaining to a critical path of the circuit;
determining, using one or more computer processors, a scope associated with the critical path, wherein the scope includes:
a first set of one or more logic instances in the critical paths;
a second set of one or more logic instances required to correctly analyze signal propagation to guarantee an expected timing result for the critical path; and
a third set of one or more logic instances that are coupled to the critical path through cross-coupling capacitance; and
a fourth set of one or more logic instances external to the critical path and directly coupled to one or more outputs of a logical instance on the critical path such that the fourth set of one or more logical instances contribute to one or more external loads of the critical path; and
performing a fix based at least in part on physical information associated with the circuit to improve timing of the scope.
11. The method of claim 10 , wherein the timing information is obtained from a separate timing analysis process.
12. The method of claim 10 , wherein the critical path includes a path with a timing violation.
13. The method of claim 10 , wherein the second set of one or more logical instances and the third set of one or more logical instances include external logic instances that affect timing of the critical path.
14. The method of claim 10 , wherein the physical information includes route information and placement information.
15. The method of claim 10 , wherein performing the fix is further based at least in part on logical information associated with the circuit.
16. The method of claim 10 , further comprising performing timing analysis on the scope, including computing timing of the scope and calibrating a computed result of the computed timing of the scope to conform to a separate timing analysis process that generated the timing information.
17. The method of claim 10 , wherein performing the fix based at least in part on the physical information associated with the circuit to improve timing of the scope includes:
accessing scope information, timing information, and physical information;
determining a candidate fix for the scope;
determining feasibility of the candidate fix based on the physical information; and
accepting the candidate fix in the event that the candidate fix is deemed to be feasible.
18. The method of claim 17 , wherein the candidate fix includes a logical fix, a physical fix, or both.
19. A computer program product for modifying a circuit, the computer program product being embodied in a tangible non-transitory computer readable storage medium and comprising computer instructions for:
obtaining timing information of the circuit, wherein the timing information includes timing information pertaining to a critical path of the circuit;
determining a scope associated with the critical path, wherein the scope includes:
a first set of one or more logic instances in the critical paths;
a second set of one or more logic instances required to correctly analyze signal propagation to guarantee an expected timing result for the critical path; and
a third set of one or more logic instances that are coupled to the critical path through cross-coupling capacitance; and
a fourth set of one or more logic instances external to the critical path and directly coupled to one or more outputs of a logical instance on the critical path such that the fourth set of one or more logical instances contribute to one or more external loads of the critical path; and
performing a fix based at least in part on physical information associated with the circuit to improve timing of the scope.