Stacked die integrated circuit
View Patent ↗An apparatus relates generally to an integrated circuit package. In such an apparatus, a package substrate has a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate. An die has a second plurality of via structures extending to a lower surface of the die. The lower surface of the die faces the upper surface of the package substrate in the integrated circuit package. The package substrate does not include a redistribution layer. The die and the package substrate are coupled to one another.
1. An apparatus, comprising:
a package substrate having a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate;
a plurality of bond via array wires coupled to the first plurality of via structures at the lower surface of the package substrate;
a die having a second plurality of via structures extending to a lower surface of the die;
wherein the lower surface of the die faces the upper surface of the package substrate in an integrated circuit package;
wherein the package substrate does not include a redistribution layer; and
wherein the die and the package substrate are coupled to one another.
2. The apparatus according to claim 1 , wherein the first plurality of via structures of the package substrate are respectively coupled to the second plurality of via structures of the die for a one-to-one correspondence between the first plurality of via structures and the second plurality of via structures.
3. The apparatus according to claim 1 , wherein the first plurality of via structures are directly coupled to the second plurality of via structures.
4. The apparatus according to claim 1 , wherein the first plurality of via structures are respectively directly coupled to the second plurality of via structures through a corresponding plurality of interconnects.
5. The apparatus according to claim 1 , wherein the first plurality of via structures are on a first pitch which is equal to a second pitch of the second plurality of via structures.
6. The apparatus according to claim 5 , wherein:
the die includes the redistribution layer disposed along an upper surface of the die;
the die is an interposer; and
the redistribution layer of the interposer is coupled to the second plurality of via structures of the interposer.
7. The apparatus according to claim 6 , further comprising:
a plurality of dies coupled to the upper surface of the interposer with a plurality of interconnects; and
the plurality of interconnects coupled to the upper surface of the package substrate.
8. The apparatus according to claim 7 , wherein the plurality of interconnects are on a third pitch having a greater density than both the first pitch and the second pitch.
9. The apparatus according to claim 8 , wherein the third pitch is 0.45 mm or less.
10. The apparatus according to claim 9 , wherein the first plurality of via structures and the second plurality of via structures are exclusively for power, ground, and package-to-board input/output communication.
11. The apparatus according to claim 1 , wherein the package substrate is substantially thicker than the die.
12. An apparatus, comprising:
a package substrate having a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate;
a plurality of bond via array wires coupled to the first plurality of via structures at the lower surface of the package substrate;
a plurality of balls coupled to the plurality of bond via array wires for interconnection with the first plurality of via structures;
a die having a second plurality of via structures extending to a lower surface of the die;
wherein the lower surface of the die faces the upper surface of the package substrate in an integrated circuit package;
wherein the package substrate does not include a redistribution layer;
wherein the die and the package substrate are coupled to one another; and
wherein upper ends of the first plurality of via structures provide a layer of interconnect structures extending above the upper surface of the package substrate.
13. The apparatus according to claim 12 , wherein the upper ends of the layer of interconnect structures include conical-shaped raised ends.
14. The apparatus according to claim 12 , wherein the first plurality of via structures of the package substrate are respectively coupled to the second plurality of via structures of the die for a one-to-one correspondence between the first plurality of via structures and the second plurality of via structures.
15. The apparatus according to claim 12 , wherein the first plurality of via structures have a first pitch which is equal to a second pitch of the second plurality of via structures.
16. The apparatus according to claim 15 , wherein:
the die includes the redistribution layer disposed along an upper surface of the die;
the die is an interposer; and
the redistribution layer of the interposer is coupled to the second plurality of via structures of the interposer.
17. The apparatus according to claim 16 , further comprising:
a plurality of dies coupled to the upper surface of the interposer with a plurality of interconnects; and
the plurality of interconnects coupled to the upper surface of the package substrate.
18. An apparatus, comprising:
a package substrate having a first plurality of via structures extending from a lower surface of the package substrate to an upper surface of the package substrate;
a plurality of bond via array wires coupled to the first plurality of via structures at the lower surface of the package substrate;
a plurality of balls coupled to the plurality of bond via array wires for interconnection with the first plurality of via structures;
a molding material layer for covering the bond via array wires between the plurality of balls and the lower surface of the package substrate;
an interposer having a second plurality of via structures extending to a lower surface of the interposer;
wherein the lower surface of the interposer faces the upper surface of the package substrate in an integrated circuit package;
wherein the package substrate does not include a redistribution layer;
wherein the interposer and the package substrate are coupled to one another;
wherein the first plurality of via structures have a first pitch which is equal to a second pitch of the second plurality of via structures;
a plurality of dies coupled to the upper surface of the interposer with a plurality of interconnects;
the plurality of interconnects coupled to the upper surface of the package substrate; and
wherein the plurality of interconnects are on a third pitch having a greater density than both the first pitch and the second pitch.
19. The apparatus according to claim 18 , wherein upper ends of the first plurality of via structures provide a layer of micro pins extending above the upper surface of the package substrate.