CMOS SPAD array with mixed timing pick-off for time-of-flight positron emission tomography
Timing pick-off is provided in time-of-flight positron emission using digital output photo sensors (e.g., SPAD or dSiPM). The timing-to-digital converter (TDC) is replaced for timing detection with a mixed analog and digital timing pick-off (MTP) where a processor determines the timing from an output of the MTP. The digital SPAD or dSiPM output is summed into an analog waveform, allowing for triggering based on signal statistics or other than at a particular number of discrete detections. The trigger is used by the processor to extrapolate the time of occurrence without an integrated TDC.
1. A system for timing pick-off in time-of-flight positron emission tomography, the system comprising:
an array of single photon avalanche diodes formed as complementary metal-oxide semiconductors;
a summer connected with the single photon avalanche diodes of the array, the summer for analog summing pulses from the single photon avalanche diodes into a waveform of positron emission signal over time;
a trigger circuit connected with the summer, the trigger circuit configured to generate a trigger signal based on a scintillation photon statistic of the waveform; and
a timing circuit connected with the trigger circuit, the timing circuit configured to determine a start time of the trigger signal;
wherein the photon statistic is a trigger threshold determined by a pulse lowest noise-to-slope ratio (NSR); and
wherein the summer, trigger circuit, and timing circuit are free of a time-to-digital converter.
2. The system of claim 1 wherein the single photon avalanche diodes comprise digital silicon photomultipliers.
3. The system of claim 1 wherein the array comprises a first chip, and wherein the summer and trigger circuit are formed in a second chip wafer bonded to the first chip, the first chip separating the second chip from a scintillation crystal.
4. The system of claim 1 wherein the summer comprises a continuous analog summer.
5. The system of claim 1 wherein the analog summer sums the pulses into the waveform of voltage where the waveform rises in amplitude as additional pulses occur.
6. The system of claim 1 wherein the trigger circuit comprises a comparator with a reference amplitude input and an input of the waveform, the comparator generating the trigger signal as a state transition when the waveform rises to cross a reference threshold.
7. The system of claim 1 further comprising a plurality of comparators, each of the comparators connected with a respective one of the single photon avalanche diodes, and wherein the summer connects with outputs of the comparators.
8. The system of claim 1 wherein the trigger circuit comprises:
an analog filter configured to generate a ramp signal as a function of the waveform; and
an analog-to-digital converter configured to convert the ramp signal into digital samples.
9. The system of claim 8 wherein the timing circuit comprises a processor configured to determine the start time as a time at which the ramp signal has a predefined amplitude.
10. The system of claim 1 wherein the timing circuit comprises a field programmable gate array configured by logic to determine the start time as a predefined amplitude point of the trigger signal.
11. The system of claim 1 wherein the summer and the trigger circuit comprise a mixed analog and digital timing pickoff circuit configured to generate the trigger signal.
12. The system of claim 1 wherein the trigger circuit comprises an analog-to-digital converter and processor based mixed timing pickoff circuit implemented per detector block to convert the trigger signal with a time-deterministic leading edge to a time-mark in digits.
13. The system of claim 1 wherein the trigger threshold is determined experimentally to find a best timing.
14. The system of claim 3 wherein the trigger threshold is determined experimentally to find a lowest jitter.