IP Library Granted Patent US 9,444,010
Granted Patent B2
US 9,444,010 · App. 14/776,562 · Granted Sep 13, 2016

Process for forming light-emitting diodes

Inventors: Hubert Bono (Grenoble, FR); Bernard Andre (Quaix ex Chartreuse, FR); Adrien Gasse (Seyssins, FR)
Assignee: Commissariat a l'energie atomique et aux energies alternatives
H01L33/32H01L33/08H01L33/46H01L33/502H01L33/641H01L2933/0025H01L2933/0033H01L2933/0041H01L2933/0075
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Quick Facts
Patent No.
US 9,444,010
App. No.
14/776,562
Granted
Sep 13, 2016
Kind
B2
Abstract

The invention relates to a process for manufacturing light-emitting diodes comprising the following steps: a) forming light-emitting diodes ( 5 ) on a silicon layer ( 1 ) of an SOI wafer ( 1, 2, 3 ), said layer resting on a carrier ( 2, 3 ); b) bonding, on the light-emitting diode side, a silicon wafer forming a cap ( 7 ) equipped with a void facing each light-emitting diode; c) thinning the silicon wafer to form an aperture facing each light-emitting diode; d) filling each aperture with a transparent material ( 21, 23 ); and e) at least partially removing the carrier of the SOI wafer ( 3 ) and producing connecting and heat-sinking metallizations.

Claims (16)

1. A light-emitting diode manufacturing method comprising the steps of:

a) forming light-emitting diodes on a silicon layer of an SOI-type wafer, said layer resting on a support;

b) bonding on the light-emitting diode side a silicon wafer forming a cap provided with a non-through recess opposite each light-emitting diode;

c) leveling down the bonded silicon wafer to form a through opening opposite each light-emitting diode;

d) filling each opening with a transparent material; and

e) at least partially removing the support of the SOI-type wafer from the entire SOI-type wafer and forming connection and heat sink metallizations.

2. The method of claim 1 , wherein steps c), d), and e) follow one another.

3. The method of claim 1 , wherein at least the removal of the support of the SOI-type wafer of step e) is carried out before steps c) and d).

4. The method of claim 1 , further comprising a step of cutting into individual light-emitting diodes or into groups of light-emitting diodes.

5. The method of claim 1 , wherein the lateral surfaces of each recess of the silicon wafer forming a cap are coated with a reflective deposit.

6. The method of claim 1 , wherein the light-emitting diodes are nanowire light-emitting diodes.

7. The method of claim 6 , wherein the nanowires are GaN nanowires.

8. The method of claim 7 , wherein the nanowires are formed from a seed layer deposited on the silicon layer.

9. The method of claim 1 , wherein the filling of the openings is performed with a transparent material provided with phosphors in its portion close to the light-emitting diodes.

10. The method of claim 1 , wherein the external surface of the filling material is shaped to have desired optical characteristics.

11. The method of claim 1 , wherein the support of the SOI-type wafer comprises a handle and an insulating layer interposed between the handle and the silicon layer and wherein, at step (e), the handle is totally removed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2015
From: BONO, HUBERT; ANDRE, BERNARD; GASSE, ADRIEN
To: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
Reel/Frame 037224/0423 →
Priority Claims (1)
FR 13 52275 · Mar 14, 2013 · national
Continuity (1)
Related Publication 20160155900A1 · Jun 2, 2016