IP Library Granted Patent US 9,459,917
Granted Patent B2
US 9,459,917 · App. 13/783,968 · Granted Oct 4, 2016

Thread selection according to power characteristics during context switching on compute nodes

Inventors: Charles J. Archer (Rochester, MN); Michael A. Blocksome (Rochester, MN); Amanda E. Randles (Cambridge, MA); Joseph D. Ratterman (Seattle, WA); Brian E. Smith (Knoxville, TN)
Assignee: International Business Machines Corporation
G06F9/4893G06F1/329G06F9/5027G06F9/5094G06F1/3203G06F9/46G06F9/48G06F2209/5018Y02B60/142Y02B60/144
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Quick Facts
Patent No.
US 9,459,917
App. No.
13/783,968
Granted
Oct 4, 2016
Kind
B2
Abstract

Methods, apparatus, and products are disclosed for thread selection during context switching on a plurality of compute nodes that includes: executing, by a compute node, an application using a plurality of threads of execution, including executing one or more of the threads of execution; selecting, by the compute node from a plurality of available threads of execution for the application, a next thread of execution in dependence upon power characteristics for each of the available threads; determining, by the compute node, whether criteria for a thread context switch are satisfied; and performing, by the compute node, the thread context switch if the criteria for a thread context switch are satisfied, including executing the next thread of execution.

Claims (27)

1. A method of thread selection for context switching on a plurality of compute nodes, the method comprising:

executing, by a compute node of the plurality of compute nodes, a plurality of threads of execution for an application;

predefining power characteristics of each thread available for execution of the application;

selecting, by the compute node from the plurality of available threads of execution for the application, a next thread of execution in dependence upon power characteristics for each of the available threads according to a power mode switching algorithm by:

determining a current power mode for the compute node while executing a thread of the application, wherein the current power mode comprises a description of a power consumption of the compute node, wherein the power mode switching algorithm specifies that a period of processing in a high power mode is to be followed by a period of processing in a low power mode associated with less power consumption than the high power mode; and

selecting, from the available threads of execution, the next thread of execution according to the power mode switching algorithm, the next thread having predefined power characteristics that enable the compute node to enter the low power mode; and

executing the selected next thread.

2. The method of claim 1 wherein the next thread of execution is a software thread.

3. The method of claim 1 wherein the next thread of execution is a hardware thread in a Symmetric Multi-Processing (‘SMP’) architecture.

4. The method claim 1 wherein the plurality of compute nodes are connected together for data communications using a plurality of data communications networks, at least one of the data communications networks optimized for point to point operations, and at least one of the data communications networks optimized for collective operations.

5. A parallel computer configured to thread selection for context switching on a plurality of compute nodes, the parallel computer comprising the plurality of compute nodes, each of the compute nodes comprising one or more computer processors and computer memory operatively coupled to the computer processors, the computer memory having disposed within it computer program instructions capable of:

executing, by a compute node of the plurality of compute nodes, a plurality of threads of execution for an application;

predefining power characteristics of each thread available for execution of the application;

selecting, by the compute node from the plurality of available threads of execution for the application, a next thread of execution in dependence upon power characteristics for each of the available threads according to a power mode switching algorithm by:

determining a current power mode for the compute node while executing a thread of the application, wherein the current power mode comprises a description of a power consumption of the compute node, wherein the power mode switching algorithm specifies that a period of processing in a high power mode is to be followed by a period of processing in a low power mode associated with less power consumption than the high power mode; and

selecting, from the available threads of execution, the next thread of execution according to the power mode switching algorithm, the next thread having predefined power characteristics that enable the compute node to enter the low power mode; and

executing the selected next thread.

6. A computer program product for thread selection for context switching on a plurality of compute nodes, the computer program product disposed upon a non-transitory computer readable recordable medium, the computer program product comprising computer program instructions configured for:

executing, by a compute node of the plurality of compute nodes, a plurality of threads of execution for an application;

predefining power characteristics of each thread available for execution of the application;

selecting, by the compute node from the plurality of available threads of execution for the application, a next thread of execution in dependence upon power characteristics for each of the available threads according to a power mode switching algorithm by:

determining a current power mode for the compute node while executing a thread of the application, wherein the current power mode comprises a description of a power consumption of the compute node, wherein the power mode switching algorithm specifies that a period of processing in a high power mode is to be followed by a period of processing in a low power mode associated with less power consumption than the high power mode; and

selecting, from the available threads of execution, the next thread of execution according to the power mode switching algorithm, the next thread having predefined power characteristics enable the compute node to enter the low power mode; and

executing the selected next thread.

7. The computer program product of claim 6 wherein the next thread of execution is a software thread.

8. The computer program product of claim 6 wherein the next thread of execution is a hardware thread in a Symmetric Multi-Processing (‘SMP’) architecture.

9. The computer program product of claim 6 wherein the plurality of compute nodes are connected together for data communications using a plurality of data communications networks, at least one of the data communications networks optimized for point to point operations, and at least one of the data communications networks optimized for collective operations.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2013
From: ARCHER, CHARLES J.; BLOCKSOME, MICHAEL A.; RANDLES, AMANDA E.; RATTERMAN, JOSEPH D.; SMITH, BRIAN E.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 030544/0194 →
Continuity (2)
Continuation 12135604 · Jun 9, 2008
Related Publication 20130179897A1 · Jul 11, 2013