IP Library Granted Patent US 9,460,559
Granted Patent B2
US 9,460,559 · App. 14/306,782 · Granted Oct 4, 2016

Method of generating tessellation data and apparatus for performing the same

Inventors: Seok Hoon Kim (Suwon-si, KR); Chang Hyo Yu (Yongin-si, KR); Kil Whan Lee (Seoul, KR); Yong Ha Park (Seongnam-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06T17/20G06T9/001G06T2210/52
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Quick Facts
Patent No.
US 9,460,559
App. No.
14/306,782
Granted
Oct 4, 2016
Kind
B2
Abstract

A method of generating tessellation data include analyzing patch data of each of a plurality of patches; generating shared data that is shared by the patches, non-shared data that are not shared by the patches, and attribute data on an attribute of control points of each of the patches from the patch data according to a result of the analyzing; and compressing the non-shared data and the attribute data.

Claims (31)

1. A method of processing patch data of image data to generate rendered image data, the method comprising:

analyzing the patch data of each of a plurality of patches;

generating shared data that is shared by the patches, non-shared data that are not shared by the patches, and attribute data on an attribute of control points of each of the patches from the patch data according to a result of the analyzing;

creating a group data structure relating to the shared data, a patch data structure relating to each of the non-shared data, and a control point data structure relating to each of the attribute data based on the shared data, the non-shared data, and the attribute data;

compressing the patch data structure and the control point data structure; and

outputting tessellation data to a graphics processing unit to generate the rendered image data, wherein the tessellation data comprises the group data structure, the compressed patch data structure, and the compressed control point data structure.

2. The method of claim 1 , wherein the shared data comprises a number of control points, a partitioning type, a domain face type, output data topology, and a tessellation factor of the patches.

3. The method of claim 1 , wherein the non-shared data comprises an index of each of the control points included in each of the patches and a tessellation factor of each patch.

4. The method of claim 1 , wherein the group data structure comprises a pointer indicating each of patch data structures respectively matching the patches related with the group data structure.

5. The method of claim 1 , wherein the group data structure comprises a pointer indicating a next group data structure to be transmitted following the group data structure and the group data structure does not comprise the pointer indicating the next group data structure when a size of the group data structure is constant.

6. A system on chip (SoC) comprising:

a tessellation data generator configured to analyze patch data of image data comprising a plurality of patches, to generate a group data structure that is shared by the patches, a patch data structure for each of the patches that is not shared by the patches, and a control point data structure comprising attribute data on an attribute of control points of each of the patches from the patch data according to a result of the analysis, and to encode the data structures by compressing the patch data structure and the control point data structure; and

a graphics processing unit (GPU) configured to decode the encoded data structures and process data comprised in the decoded data structures,

wherein the patch data structure comprises non-shared data that is not shared by the patches and the non-shared data comprises an index of each of the control points included in each of the patches and a tessellation factor of each patch.

7. The SoC of claim 6 , wherein the group data structure comprises shared data that is shared by the patches and the shared data comprises a number of control points, a partitioning type, a domain face type, and output data topology.

8. The SoC of claim 6 , wherein the SoC is an application processor.

9. The SoC of claim 6 , wherein the tessellation data generator is implemented within a central processing unit (CPU).

10. A data processing system comprising:

the SoC of claim 6 ;

a memory configured to store the patch data of each of the patches; and

a memory interface configured to transmit the patch data of each of the patches from the memory to the SoC.

11. A method of processing patch data of image data to generate rendered image data, the method comprising:

generating a first data structure comprising shared data that is common to each patch among a plurality of patches;

generating a plurality of second data structures for each patch, wherein each second data structure comprises indices of all control points of the corresponding patch;

generating a plurality of third data structures for each patch, wherein each third data structure comprises attributes about the control points of a corresponding one of the second data structures;

compressing each of the second and third data structures; and

outputting a hierarchal data structure to a graphics processing unit to generate the rendered image data, wherein the hierarchal data structure comprises the first data structure, the second compressed data structure, and the third compressed data structure.

12. The method of claim 11 , wherein data within the second data structures are unique from one another.

13. The method of claim 11 , wherein the first data structure includes a pointer to each second data structure, and each second data structure includes a pointer to a corresponding one of the third data structures.

14. The method of claim 11 , wherein the first data structure comprises a pointer to a next data structure to be transmitted that comprises shared data that is common to each patch among another plurality of patches.

15. The method of claim 11 , wherein either the first data structure includes a tessellation factor common to all the patches, or each second data structure includes its own distinct tessellation factor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2014
From: KIM, SEOK HOON; YU, CHANG HYO; LEE, KIL WHAN; PARK, YONG HA
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 033119/0716 →
Priority Claims (1)
KR 10-2013-0095159 · Aug 12, 2013 · national
Continuity (1)
Related Publication 20150042649A1 · Feb 12, 2015