IP Library Granted Patent US 9,460,660
Granted Patent B2
US 9,460,660 · App. 14/366,089 · Granted Oct 4, 2016

Pixel circuit and display device

Inventor: Yoshimitsu Yamauchi (Osaka, JP)
Assignee: SHARP KABUSHIKI KAISHA
G09G3/3233G09G2300/0413G09G2300/0819G09G2300/0842G09G2320/0233G09G2320/045H01L51/5218H01L51/5265H01L2251/558
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Quick Facts
Patent No.
US 9,460,660
App. No.
14/366,089
Granted
Oct 4, 2016
Kind
B2
Abstract

A pixel circuit includes: a light emitting element; an n-channel drive transistor T 1 that has a source connected with an anode of the light emitting element, a gate connected with a pixel node, and controls a light emission current flowing in the light emitting element in accordance with a light emission control voltage between the gate and the source; a transfer transistor T 2 which is interposed between a data signal line and the pixel node, and has a gate connected with a scan signal line; a control transistor T 3 which is interposed between the source and a drain of the drive transistor T 1 , has a gate connected with the scan signal line, and comes into an ON state simultaneously with the transfer transistor T 2 ; and a capacitance element which is interposed between the gate and the source of the drive transistor T 1 , and holds the light emission control voltage.

Claims (68)

1. A display device in which a plurality of pixel circuits are arranged in a row direction and a column direction to constitute a pixel circuit array,

the pixel circuit comprising:

a light emitting element which emits light by a light emission current flowing from an anode electrode to a cathode electrode;

a first transistor element of an n-channel insulated gate thin-film transistor that has a source electrode connected with the anode electrode of the light emitting element, a gate electrode connected with a pixel node, and controls the light emission current in accordance with a light emission control voltage between the gate electrode and the source electrode;

a first switch circuit which is interposed between a data signal line and the pixel node and is controlled for conduction/non-conduction in accordance with a voltage level of a first control terminal connected with a scan signal line;

a second switch circuit which is interposed between the source electrode and a drain electrode of the first transistor element and is controlled for conduction/non-conduction in accordance with a voltage level of a second control terminal connected with the scan signal line, and comes into a conduction state at the time of conduction of the first switch circuit in accordance with a voltage level of the scan signal line, to selectivity short-circuit between the source electrode and the drain electrode of the first transistor; and

a capacitance element which is interposed between the gate electrode and the source electrode of the first transistor element, and holds the light emission control voltage,

wherein the pixel circuits arranged on an identical column each have one end of the first switch circuit connected to the data signal line extending in the column direction along the identical column, and

the pixel circuits arranged on an identical row each have the first control terminal of the first switch circuit and the second control terminal of the second switch circuit connected to the scan signal line extending in the row direction along the identical row, and the drain electrode of the first transistor element connected to a light emission voltage supply line extending in the row direction along the identical row,

the display device comprising:

a data signal line drive circuit which individually drives the data signal line provided in plural;

a scan signal line drive circuit which individually drives the scan signal line provided in plural;

a light emission voltage supply line drive circuit which individually drives the light emission voltage supply line provided in plural;

a monitor circuit which has a dummy pixel circuit configured by removing at least the light emitting element from the pixel circuit, and detects a current flowing between the drain electrode and the source electrode of the first transistor element provided in the dummy pixel circuit, to perform simulation monitoring of a change in electric characteristic of the first transistor element in the pixel circuit; and

a correction circuit which corrects a voltage level of the data signal line driven by the data signal line drive circuit based on a current amount detected by the monitor circuit or a value equivalent to the current amount.

2. A display device, in which

a plurality of pixel circuits are arranged in a row direction and a column direction to constitute a pixel circuit array,

the pixel circuit comprising at least:

a light emitting element which emits light by a light emission current flowing from an anode electrode to a cathode electrode;

a first transistor element of an n-channel insulated gate thin-film transistor that has a source electrode connected with the anode electrode of the light emitting element, a gate electrode connected with a pixel node, and controls the light emission current in accordance with a light emission control voltage between the gate electrode and the source electrode;

a first switch circuit which is interposed between a data signal line and the pixel node and is controlled for conduction/non-conduction in accordance with a voltage level of a first control terminal connected with a scan signal line; and

a capacitance element which is interposed between the gate electrode of the first transistor element and the source electrode or a drain electrode of the first transistor element,

the pixel circuits arranged on an identical column each have one end of the first switch circuit connected to the data signal line extending in the column direction along the identical column, and

the pixel circuits arranged on an identical row each have the first control terminal of the first switch circuit connected to the scan signal line extending in the row direction along the identical row, and the drain electrode of the first transistor element connected directly or via another circuit element to a light emission voltage supply line extending in the row direction along the identical row,

the display device comprising:

a data signal line drive circuit which individually drives the data signal line provided in plural;

a scan signal line drive circuit which individually drives the scan signal line provided in plural;

a light emission voltage supply line drive circuit which individually drives the light emission voltage supply line provided in plural;

a monitor circuit which has a dummy pixel circuit configured by removing at least the light emitting element from the pixel circuit, and detects a current flowing between the drain electrode and the source electrode of the first transistor element provided in the dummy pixel circuit, to perform simulation monitoring of a change in electric characteristic of the first transistor element in the pixel circuit; and

a correction circuit which corrects a voltage level of the data signal line driven by the data signal line drive circuit based on a current amount detected by the monitor circuit or a value equivalent to the current amount.

3. The display device according to claim 2 , wherein

the monitor circuit includes at least one dummy pixel circuit of claim 2 , in which one end of the first switch circuit is connected to at least one data signal line, and

the first control terminal of the first switch circuit in the dummy pixel circuit is connected to a dummy scan signal line.

4. The display device according to claim 3 , wherein the dummy scan signal line is driven every time each of the scan signal lines on a plurality of rows is sequentially driven by the scan signal line drive circuit in order to simultaneously bring the first switch circuits in the pixel circuits on an identical row into a conduction state.

5. The display device according to claim 3 , wherein the dummy pixel circuit is configured by removing at least the light emitting element from the pixel circuit and by including a third switch circuit which is interposed between a corresponding one of the data signal lines and the drain electrode of the first transistor element, the third switch circuit being controlled for conduction/non-conduction in accordance with a voltage level of a third control terminal connected with a monitor control signal line.

6. The display device according to claim 3 , wherein

the monitor circuit includes the dummy pixel circuit, in which one end of the first switch circuit is connected to the data signal line, with respect to each of the data signal lines, and

the first control terminal of the first switch circuit in each dummy pixel circuit is connected to the dummy scan signal line extending in the row direction.

7. The display device according to claim 2 , wherein

the dummy pixel circuit is configured by removing at least the light emitting element and the first switch circuit from the pixel circuit, and

the monitor circuit includes at least one dummy pixel circuit of claim 2 , in which the gate electrode of the first transistor element is connected to at least one data signal line.

8. The display device according to claim 7 , wherein the monitor circuit includes the dummy pixel circuit, in which the gate electrode of the first transistor element is connected to the data signal line, with respect to each of the data signal lines.

9. The display device according to claim 6 , wherein the correction circuit individually corrects a voltage level of a corresponding one of the data signal lines driven by the data signal line drive circuit with respect to each of the data signal lines based on a current amount of a current outputted individually from the source electrode of the first transistor element in the dummy pixel circuit connected to the data signal line, or a value equivalent to the current amount.

10. The display device according to claim 6 , wherein the correction circuit collectively corrects voltage levels of all of the data signal lines driven by the data signal line drive circuit based on a total or an average of current amounts of currents outputted respectively from the source electrodes of the first transistor elements in the dummy pixel circuits in the same number as the data signal lines, or a total or an average of values equivalent to the current amounts, or some other statistic value.

11. The display device according to claim 2 , wherein the monitor circuit detects a current outputted from the source electrode of the first transistor element provided in the dummy pixel circuit within a vertical blanking period.

12. The display device according to claim 11 , wherein,

within the vertical blanking period,

in a dummy transfer period set to be a period before the monitor circuit detects a current outputted from the source electrode of the first transistor element in the dummy pixel circuit,

the data signal line drive circuit supplies a reference luminance voltage for monitoring to the data signal line connected with one end of the first switch circuit in the dummy pixel circuit,

the first switch circuit in the dummy pixel circuit is controlled in a conduction state, and

the reference luminance voltage is transferred from the data signal line to the pixel node in the dummy pixel circuit.

13. The display device according to claim 1 , wherein

the monitor circuit includes at least one dummy pixel circuit of claim 1 , in which one end of the first switch circuit is connected to at least one data signal line, and

the first control terminal of the first switch circuit in the dummy pixel circuit is connected to a dummy scan signal line.

14. The display device according to claim 1 , wherein

the dummy pixel circuit is configured by removing the first switch circuit from the pixel circuit, and

the monitor circuit includes at least one dummy pixel circuit of claim 1 , in which the gate electrode of the first transistor element is connected to at least one data signal line.

15. The display device according to claim 1 , wherein

the cathode electrode of the light emitting element is connected with a reference voltage supply line,

a level of a voltage that is supplied to the light emission voltage supply line is kept at a first voltage level which does not allow the light emitting element to emit light, with a voltage of the reference voltage supply line taken as a reference, in a transfer period in which the first switch circuit is brought into a conduction state in accordance with a voltage level of the scan signal line and a luminance voltage that is based on luminance of the light emitting element and supplied from the data signal line is transferred to the pixel node, and

the level of the voltage that is supplied to the light emission voltage supply line is kept at a second voltage level which is sufficient for allowing the light emission current to flow in the light emitting element, with the voltage of the reference voltage supply line taken as a reference in a light emission period in which the first switch circuit is brought into a non-conduction state in accordance with a voltage level of the scan signal line, the light emission control voltage is held in the capacitance element, the light emitting current based on the light emission control voltage is allowed to flow, and the light emitting element thereby emits light.

16. The display device according to claim 1 , wherein

the first switch circuit is a second transistor element of an n-channel insulated gate thin-film transistor with a gate electrode being the first control terminal, a source electrode of the second transistor element is connected with the pixel node, and a drain electrode of the second transistor element is connected with the data signal line, and

the second switch circuit is a third transistor element of an n-channel insulated gate thin-film transistor with a gate electrode being the second control terminal, a source electrode of the third transistor element is connected with the source electrode of the first transistor element, and a drain electrode of the third transistor element is connected with the drain electrode of the first transistor element.

17. The display device according to claim 1 , wherein the first transistor element is an oxide semiconductor transistor.

18. The pixel circuit according to claim 16 , wherein at least the first transistor element and the second transistor element out of the first to third transistor elements are oxide semiconductor transistors.

19. The pixel circuit according to claim 1 , wherein the drain electrode of the first transistor element provided in the dummy pixel circuit is electrically connected to a different line other than the light emission voltage supply line.

20. The pixel circuit according to claim 2 , wherein the drain electrode of the first transistor element provided in the dummy pixel circuit is electrically connected to a different line other than the light emission voltage supply line.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2014
From: YAMAUCHI, YOSHIMITSU
To: SHARP KABUSHIKI KAISHA
Reel/Frame 033120/0699 →
Priority Claims (1)
JP 2011-279284 · Dec 21, 2011 · national
Continuity (1)
Related Publication 20140361960A1 · Dec 11, 2014