Semiconductor memory device and method for manufacturing the same
According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode members and a plurality of insulating members, each of the electrode members and each of the insulating members being stacked alternately in a first direction on the substrate. The semiconductor memory device also includes a memory hole that extends in the stacked body in the first direction and a semiconductor member that is disposed to extend in the memory hole in the first direction. The semiconductor memory device also includes a memory member that is disposed between the semiconductor member and the plurality of electrode members. The plurality of electrode members including a first electrode member and a second electrode member, a thickness of the memory member at the position of the first electrode member being greater than a thickness of the memory member at the position of the second electrode member.
1. A semiconductor memory device comprising:
a substrate;
a stacked body including a plurality of electrode members and a plurality of insulating members, each of the electrode members and each of the insulating members being stacked alternately in a first direction on the substrate;
a memory hole that extends in the stacked body in the first direction;
a semiconductor member that is disposed to extend in the memory hole in the first direction; and
a memory member that is disposed between the semiconductor member and the plurality of electrode members,
the plurality of electrode members including a first electrode member and a second electrode member,
a diameter of the memory hole at a position of the first electrode member being smaller than a diameter of the memory hole at a position of the second electrode member, and
a thickness of the memory member at the position of the first electrode member being greater than a thickness of the memory member at the position of the second electrode member.
2. The device according to claim 1 , wherein
the memory member includes a first insulating member that is disposed between the semiconductor member and the electrode member, a second insulating member that is disposed between the first insulating member and the semiconductor member, and a third insulating member that is disposed between the first insulating member and the electrode member, and
a thickness of the second insulating member at the position of the first electrode member is greater than a thickness of the second insulating member at the position of the second electrode member.
3. The device according to claim 1 , wherein a distance between the substrate and the first electrode member is less than a distance between the substrate and the second electrode member.
4. The device according to claim 1 , wherein
the plurality of electrode members further include a third electrode member,
a diameter of the memory hole at a position of the third electrode member is larger than the diameter of the memory hole at the position of the second electrode member, and
a thickness of the memory member at the position of the third electrode member is smaller than a thickness of the memory member at the position of the second electrode member.
5. The device according to claim 4 , wherein
the memory member includes a first insulating member that is disposed between the semiconductor member and the electrode member, a second insulating member that is disposed between the first insulating member and the semiconductor member, and a third insulating member that is disposed between the first insulating member and the electrode member,
a thickness of the second insulating member at the position of the first electrode member is greater than a thickness of the second insulating member at the position of the second electrode member, and
a thickness of the second insulating member at the position of the second electrode member is greater than a thickness of the second insulating member at a position of the third electrode member.
6. The device according to claim 4 , wherein
a distance between the substrate and the first electrode member is less than a distance between the substrate and the second electrode member, and
a distance between the substrate and the second electrode member is less than a distance between the substrate and the third electrode member.
7. The device according to claim 1 , wherein
a diameter of the memory hole becomes gradually smaller from an upper section to a lower section of the stacked body, and
a thickness of the memory member becomes gradually larger from the upper section to the lower section of the stacked body.
8. The device according to claim 1 , wherein
a diameter of the memory hole becomes gradually smaller from an upper section to a lower section of the stacked body, and
a thickness of the second insulating member becomes gradually larger from the upper section to the lower section of the stacked body.
9. The device according to claim 2 , wherein the second insulating member contains silicon oxide.
10. The device according to claim 2 , wherein the second insulating member contains silicon oxynitride.
11. The device according to claim 2 , wherein the second insulating member contains silicon nitride.
12. The device according to claim 2 , wherein the first insulating member contains silicon nitride.
13. The device according to claim 2 , wherein the first insulating member corresponds to a charge storage member, the second insulating member corresponds to a tunnel insulating member, and the third insulating member corresponds to a block insulating member.
14. A semiconductor memory device comprising:
a substrate;
a stacked body including a plurality of electrode members and a plurality of insulating members, each of the electrode members and each of the insulating members being stacked alternately in a first direction on the substrate;
a memory hole that extends in the stacked body in the first direction;
a semiconductor member that is disposed to extend in the memory hole in the first direction; and
a memory member that is disposed between the semiconductor member and the plurality of electrode members,
the plurality of electrode members including a first electrode member and a second electrode member,
a width of the memory hole of a direction perpendicular to the first direction in a plane including the first direction at a position of the first electrode member being smaller than a width of the memory hole of a direction perpendicular to the first direction in a plane including the first direction at a position of the second electrode member, and
a thickness of the memory member at the position of the first electrode member being greater than a thickness of the memory member at the position of the second electrode member.