III-V semiconductor CMOS FinFET device
A method for forming a semiconductor device comprises forming an insulator layer on a semiconductor substrate, removing portions of the insulator layer to form a first cavity and a second cavity, the first cavity exposing a first portion of the semiconductor substrate an the second cavity exposing a second portion of the semiconductor substrate, growing a first semiconductor material in the first cavity and the second cavity. Growing a second semiconductor material on the first semiconductor material in the first cavity and the second cavity, growing a third semiconductor material on the second semiconductor material in the first cavity and the second cavity. Forming a mask over the third semiconductor material in the first cavity, removing the third semiconductor material from the second cavity to expose the second semiconductor material in the second cavity, and growing a fourth semiconductor material on the second semiconductor material in the second cavity.
1. A method for forming a semiconductor device, the method comprising:
forming an insulator layer on a semiconductor substrate;
removing portions of the insulator layer to form a first cavity and a second cavity, the first cavity exposing a first portion of the semiconductor substrate and the second cavity exposing a second portion of the semiconductor substrate;
growing a first semiconductor material in the first cavity and the second cavity;
growing a second semiconductor material on the first semiconductor material in the first cavity and the second cavity;
growing a third semiconductor material on the second semiconductor material in the first cavity and the second cavity;
forming a mask over the third semiconductor material in the first cavity;
removing the third semiconductor material from the second cavity to expose the second semiconductor material in the second cavity; and
growing a fourth semiconductor material on the second semiconductor material in the second cavity.
2. The method of claim 1 , wherein the first semiconductor material includes a first III-V compound material.
3. The method of claim 1 , wherein the second semiconductor material includes a second III-V compound material.
4. The method of claim 1 , wherein the third semiconductor material includes silicon germanium.
5. The method of claim 1 , wherein the third semiconductor material includes germanium.
6. The method of claim 1 , wherein the fourth semiconductor material includes a third III-V compound material.
7. The method of claim 1 , wherein the insulator layer includes an oxide material.
8. The method of claim 1 , further comprising performing a planarizing process to remove portions of the third semiconductor material prior to forming the mask.
9. The method of claim 1 , further comprising performing a planarizing process to remove portions of the fourth semiconductor material after growing the fourth semiconductor material.
10. A method for forming a semiconductor device, the method comprising:
forming an insulator layer on a semiconductor substrate;
removing portions of the insulator layer to form a first cavity and a second cavity, the first cavity exposing a first portion of the semiconductor substrate and the second cavity exposing a second portion of the semiconductor substrate;
growing a first semiconductor material in the first cavity and the second cavity;
growing a second semiconductor material on the first semiconductor material in the first cavity and the second cavity;
growing a third semiconductor material on the second semiconductor material in the first cavity and the second cavity;
forming a mask over the third semiconductor material in the first cavity;
removing the third semiconductor material from the second cavity and the second semiconductor material from the second cavity to expose the first semiconductor material in the second cavity; and
growing a fourth semiconductor material on the first semiconductor material in the second cavity; and
growing a fifth semiconductor material on the second semiconductor material in the second cavity.
11. The method of claim 10 , wherein the first semiconductor material includes a first III-V compound material.
12. The method of claim 10 , wherein the second semiconductor material includes a second III-V compound material.
13. The method of claim 10 , wherein the third semiconductor material includes silicon germanium.
14. The method of claim 10 , wherein the third semiconductor material includes germanium.
15. The method of claim 10 , wherein the fourth semiconductor material includes a fourth III-V compound material.
16. The method of claim 10 , wherein the fifth semiconductor material includes a fifth III-V compound material.
17. The method of claim 10 , wherein the insulator layer includes an oxide material.