IP Library Granted Patent US 9,529,632
Granted Patent B2
US 9,529,632 · App. 12/553,652 · Granted Dec 27, 2016

Interlocked increment memory allocation and access

Inventors: Michael Mantor (Orlando, FL); John McCardle (Indialantic, FL); Marcos Zini (Oviedo, FL); Brian Emberling (Palo Alto, CA)
Assignee: Advanced Micro Devices, Inc.
G06F9/5016
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Quick Facts
Patent No.
US 9,529,632
App. No.
12/553,652
Granted
Dec 27, 2016
Kind
B2
Abstract

A method of allocating a memory to a plurality of concurrent threads is presented. The method includes dynamically determining writer threads each having at least one pending write to the memory; and dynamically allocating respective contiguous blocks in the memory for each of the writer threads. Another method of allocating a memory to a plurality of concurrent threads includes launching the plurality of threads as a plurality of wavefronts, dynamically determining a group of wavefronts each having at least one thread requiring a write to the memory, and dynamically allocating respective contiguous blocks in the memory for each wavefront from the group of wavefronts. A corresponding method of assigning a memory to a plurality of reader threads includes determining a first number corresponding to a number of writer threads having a block allocated in said memory, launching a first number of reader threads, entering a first wavefront of said reader threads from said group of wavefronts to an atomic operation, and assigning a first block in the memory to the first wavefront during the corresponding atomic operation, where the first block is contiguous to a previously allocated block dynamically allocated to another wavefront from said group of wavefronts. Corresponding system embodiments and computer program product embodiments are also presented.

Claims (80)

1. A method, comprising:

dynamically determining, from a plurality of concurrent threads, writer threads each having at least one pending write to a memory;

sequentially entering the writer threads into an atomic operation; and

dynamically allocating respective blocks in the memory to corresponding ones of the writer threads that have entered the atomic operation, wherein each of the allocated respective blocks is contiguous to other ones of the allocated respective blocks.

2. The method of claim 1 , wherein said dynamically allocating comprises;

reading, during the atomic operation sequentially entered by a corresponding one of the writer threads, a thread memory counter to obtain a pre-operation value;

updating, during the atomic operation sequentially entered by the corresponding one of the writer threads, the thread memory counter to indicate allocation of a block of said memory to the corresponding one of the writer threads; and

calculating a write address for the corresponding one of the writer threads based on the pre-operation value.

3. A method, comprising:

launching a plurality of threads as a plurality of wavefronts;

dynamically determining, from the plurality of wavefronts, a group of wavefronts each having at least one thread requiring a write to a memory;

sequentially entering wavefronts from the group of wavefronts into an atomic operation; and

dynamically allocating respective blocks in the memory to corresponding ones of the wavefronts that have entered the atomic operation, wherein each of the allocated respective blocks is contiguous to other ones of the allocated respective blocks.

4. The method of claim 3 , wherein said launching comprises:

detecting, in each one of said group of wavefronts, at least one thread having a pending memory allocate instruction.

5. The method of claim 3 , wherein said dynamically allocating comprises:

allocating during the atomic operation sequentially entered by a first wavefront from the group of wavefronts a first block in the memory to the first wavefront, wherein the first block is contiguous to a previously allocated block dynamically allocated to another one of said group of wavefronts.

6. The method of claim 5 , wherein said allocating a first block comprises:

reading a pre-operation value of a global memory block counter;

determining the size of the first block;

determining a base address for the first block in said memory based on parameters including the pre-operation value; and

updating the global memory block counter based on the size of the first block and the base address,

wherein said reading, said determining the size of the first block, said determining a base address, and said updating the global memory are performed during the atomic operation.

7. The method of claim 6 , wherein the determining the size of the first block comprises:

initializing a thread memory counter;

processing the thread memory counter by respective threads of the first one of the group of wavefronts;

determining a contributor count based on the processed thread memory counter, wherein the contributor count represents a number of said threads that request allocations of said memory; and

computing the size of the first block based on parameters including the contributor count.

8. The method of claim 7 , wherein the processing the thread memory counter comprises:

determining a write address in said memory for each thread in the first one of the group of wavefronts; and

updating of the thread memory counter by said each thread.

9. The method of claim 8 , wherein the determining a write address comprises:

entering a first one of said each thread to a second atomic operation;

reading, during the second atomic operation, the contributing thread memory counter to obtain a second pre-operation value;

updating, during the second atomic operation, the contributing thread memory counter to a second post-operation value to indicate allocation of a sub-block of said memory to the first one of said each thread; and

calculating a write address for the first thread based on the second pre-operation value.

10. The method of claim 3 , wherein said sequentially entering comprises:

identifying a first wavefront having the highest precedence according to a precedence ordering of said group of wavefronts, wherein the first wavefront has not been allocated a block in said memory.

11. The method of claim 10 , wherein the identifying a first wavefront comprises:

enqueuing respective ones of said group of wavefronts in a request queue; and

dequeuing the first wavefront from the request queue according to the precedence ordering.

12. The method of claim 3 , wherein said sequentially entering comprises:

enqueueing respective ones of said group of wavefronts in a request queue;

dequeuing a first wavefront according to a precedence ordering; and

entering the first wavefront from said group of wavefronts to the atomic operation.

13. A processor comprising:

at least one data-parallel thread processor configured to execute a plurality of concurrent threads; and

a compact memory allocator, configured to:

dynamically determine, from the plurality of concurrent threads, writer threads each having at least one pending write to a memory;

sequentially enter the writer threads into an atomic operation; and

dynamically allocate respective blocks in the memory to corresponding ones of the writer threads that have entered the atomic operation, wherein each of the allocated respective blocks is contiguous to other ones of the allocated respective blocks.

14. The processor of claim 13 , further comprising:

at least one thread memory counter coupled to the at least one data-parallel thread. processor, wherein said respective blocks in the memory for each of the writer threads are dynamically allocated using the at least one thread memory counter.

15. The processor of claim 13 , further comprising:

a global memory block counter coupled to the at least one data-parallel thread processor; and

wherein the compact memory allocator is further configured to:

dynamically determine, from a plurality of wavefronts, a group of wavefronts each having at least one thread requiring a write to the memory; and

sequentially enter wavefronts from the group of wavefronts into an atomic operation; and

dynamically allocate, using the global memory block counter, respective blocks in the memory to corresponding ones of the wavefronts that have entered the atomic operation, wherein each of the allocated respective blocks is contiguous to other ones of the allocated respective blocks.

16. The processor of claim 15 , further comprising:

a wavefront order enforcer configured to:

identify a first wavefront having the highest precedence according to a precedence ordering of said group of wavefronts, and wherein the first wavefront has not been allocated a block in said memory;

wherein the compact memory allocator is further configured to:

enter the first wavefront to the atomic operation; and

allocate a first block in the memory to the first wavefront during the atomic operation, wherein the first block is contiguous to a previously allocated block dynamically allocated to another wavefront from said group of wavefronts.

17. The processor of claim 16 , wherein the wavefront order enforcer comprises:

a wavefront table configured to:

enqueue respective ones of said group of wavefronts in a request queue; and

dequeue a first wavefront according to the precedence ordering;

a wavefront crawler configured to:

determine the first wavefront according to the precedence ordering.

18. A non-transitory computer readable storage medium storing instructions wherein said instructions when executed are adapted to allocate a memory to a plurality of concurrent threads, by comprising:

dynamically determining, from the plurality of concurrent threads, writer threads each having at least one pending write to the memory;

sequentially entering the writer threads into an atomic operation; and

dynamically allocating respective blocks in the memory to corresponding ones of the writer threads that have entered the atomic operation, wherein each of the allocated respective blocks is contiguous to other ones of the allocated respective blocks.

19. A non-transitory computer readable storage medium storing instructions wherein said instructions when executed are adapted to allocate a memory to a plurality of concurrent threads, by comprising:

launching the plurality of threads as a plurality of wavefronts;

dynamically determining; from the plurality of wavefronts, a group of wavefronts each having at least one thread requiring a write to the memory;

sequentially entering wavefronts from the group of wavefronts into an atomic operation; and

dynamically allocating respective blocks in the memory to corresponding ones of the wavefronts that have entered the atomic operation, wherein each of the allocated respective blocks is contiguous to other ones of the allocated respective blocks.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2009
From: MANTOR, MICHAEL; MCCARDLE, JOHN; ZINI, MARCOS; EMBERLING, BRIAN
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 023559/0354 →
Continuity (1)
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