IP Library Granted Patent US 9,547,595
Granted Patent B2
US 9,547,595 · App. 14/855,642 · Granted Jan 17, 2017

Salvaging lock elision transactions

Inventors: Harold W. Cain, III (Raleigh, NC); Michael Karl Gschwind (Chappaqua, NY); Maged M. Michael (Danbury, CT); Chung-Lung K. Shum (Wappingers Falls, NY)
Assignee: International Business Machines Corporation
G06F12/0815G06F9/528G06F12/084G06F12/0828G06F2212/1032G06F2212/62
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,547,595
App. No.
14/855,642
Granted
Jan 17, 2017
Kind
B2
Abstract

A transactional memory system salvages hardware lock elision (HLE) transactions. A computer system of the transactional memory system records information about locks elided to begin HLE transactional execution of first and second transactional code regions. The computer system detects a pending cache line conflict of a cache line, and based on the detecting stops execution of the first code region of the first transaction and the second code region of the second transaction. The computer system determines that the first lock and the second lock are different locks and uses the recorded information about locks elided to acquire the first lock of the first transaction and the second lock of the second transaction. The computer system commits speculative state of the first transaction and the second transaction and the computer system continues execution of the first code region and the second code region non-transactionally.

Claims (17)

1. A method for salvaging hardware lock elision (HLE) transactions, the method comprising:

recording, by a computer system, information about locks elided to begin HLE transactional execution of a first transactional code region of a first transaction having an elided first lock;

recording information about locks elided to begin HLE transactional execution of a second transactional code region of a second transaction having an elided second lock, the first transaction and the second transaction executing concurrently;

detecting a pending cache line conflict of a cache line monitored associated with the first transaction, wherein the detecting indicates that the first transactional code region has a false sharing conflict with the second transactional code region; and

salvaging execution of the first transactional code region and the second transactional code region by:

based on the detecting, stopping execution of the first transactional code region of the first transaction and the second transactional code region of the second transaction;

determining that the first lock and the second lock are different locks;

based on the determining, using the recorded information about locks elided to acquire the first lock of the first transaction and the second lock of the second transaction;

based on the stopping the execution, committing speculative state of the first transaction and the second transaction; and

based on the first lock and the second lock being acquired, continuing execution of the first transactional code region and the second transactional code region non-transactionally.

2. The method of claim 1 , wherein the recorded information about the locks elided includes the location of the first lock and the location of the second lock, and values to be used to acquire the first lock and the second lock.

3. The method of claim 2 , wherein the acquiring the first lock and the second lock using the recorded information includes writing at least one of the values to be used to acquire the locks to at least one of the locations of the locks.

4. The method of claim 1 , wherein the detecting the pending cache line conflict includes detecting a cross-interrogate, from another processor, of the cache line.

5. The method of claim 1 , wherein the stopping execution of the first transactional code region of the first transaction and the second transactional code region of the second transaction comprises stopping execution of the first transactional code region after executing a first instruction of the first transactional code region and stopping execution of the second transactional code region after executing a second instruction of the second transactional code region, the first instruction having first next instructions to be executed, the second instruction having second next instructions to be executed, wherein the continuing the execution of the respective first transactional code region and the second transactional code region non-transactionally includes executing said first next instructions in the first transactional code region and executing said second next instructions in the second transactional code region.

6. The method of claim 1 , wherein the detecting the pending cache line conflict includes determining that another processor is requesting a store to a monitored memory location.

7. The method of claim 1 , wherein the information about locks elided is recorded in at least one dedicated register, wherein the recorded information about the locks elided includes locations of the locks and values used to acquire the locks.

8. The method of claim 1 , wherein at least a portion of the speculative state of the first transaction is a speculative store stored in a gathering store cache.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2015
From: CAIN, HAROLD W., III; GSCHWIND, MICHAEL KARL; MICHAEL, MAGED M.; SHUM, CHUNG-LUNG K.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 036577/0618 →
Continuity (2)
Continuation 14191532 · Feb 27, 2014
Related Publication 20160004641A1 · Jan 7, 2016