Method and apparatus for reducing far-end crosstalk in electrical connectors
Systems, methods and apparatuses involving a chip-to-chip communication channel, for reducing Far End Crosstalk (FEXT) through the novel concept of controlling FEXT magnitude and polarity of a component inside a channel, vias or within a connector by implementing broadside and edge couplings to offset cumulative FEXT in a channel, via-connector-via subsystem or a connector. The example implementations described herein can be applied to a chip-to-chip communication channel, mezzanine connectors, backplane connectors and any other connectors requiring via routing, and connector itself that can benefit from FEXT reduction.
1. An electrical system, comprising:
a first electrical component having a differential far end crosstalk (FEXT) of a first polarity; and
a second electrical component coupled to the first electrical component and having a differential FEXT of a second polarity;
wherein the first polarity is an opposite polarity of the second polarity so as to produce FEXT cancellation;
wherein the first electrical component comprises a printed circuit board comprising at least two pairs of signal vias, wherein the second electrical component comprises an electrical connector comprising a plurality of signal conductors, and wherein the at least two pairs of signal vias are connected to at least two pairs of signal pads configured to be mounted by the plurality of signal conductors of the electrical connector.
2. The electrical system of claim 1 , wherein a first pair of the at least two pairs of signal vias is arranged at a first location relative to a second pair of the at least two signal vias such that a polarity of at least one of the first pair and the second pair of the at least two signal vias has an opposite differential FEXT polarity of a differential FEXT polarity of at least one pair of the plurality of signal conductors.
3. The electrical system of claim 1 , wherein the first electrical component is coupled to the second electrical component by a surface mount.
4. The electrical system of claim 1 , wherein the first electrical component is coupled to the second electrical component by a ball grid array (BGA).
5. The electrical system of claim 1 , wherein the plurality of signal conductors are connected to an edge coupling via structure configured to induce a positive differential FEXT.
6. The electrical system of claim 1 , wherein the plurality of signal conductors are connected to a broadside coupling via structure configured to induce a negative differential FEXT.
7. The electrical system of claim 1 , wherein one of the first electrical component and the second electrical component comprises a broadside coupling via structure configured to induce a negative differential FEXT, and wherein another one of the first electrical component and the second electrical component comprises an edge coupling via structure configured to induce a positive differential FEXT.
8. The electrical system of claim 1 , wherein one of the first electrical component and the second electrical component comprises a broadside coupling via structure configured to induce a negative differential FEXT.
9. The electrical system of claim 1 , wherein one of the first electrical component and the second electrical component comprises an edge coupling via structure configured to induce a positive differential FEXT.
10. The electrical system of claim 1 , wherein the electrical system comprises a connector, wherein the first electrical component comprises a first portion of the connector having an edge coupling structure configured to induce a positive differential FEXT polarity, wherein the second electrical component comprises a second portion of the connector having a broadside coupling structure configured to induce a negative differential FEXT, resulting in FEXT cancellation of the positive differential FEXT polarity induced in the first portion of the connector.
11. A printed circuit board (PCB) comprising at least two pairs of signal vias electrically connected to at least two pairs of signal pads on which signal conductors of an electrical connector are mounted:
wherein a first pair of the at least two pairs of signal vias is arranged at a location relative to a second pair of the at least two pairs of signal vias, wherein a polarity of differential FEXT caused by an aggressor via pair that is one of the first pair and the second pair is opposite to a polarity of differential FEXT caused by an aggressor signal conductor of the signal conductors;
wherein the first pair is arranged at the location relative to the second pair such that a polarity of at least one of the first pair and the second pair of the PCB has an opposite differential FEXT polarity of a differential FEXT polarity of at least one pair of the signal conductors of the electrical connector.
12. The PCB of claim 11 , wherein the first pair comprises an input differential port comprising a first input port and a second input port, wherein the second pair comprises an output differential port comprising a first output port and a second output port; wherein the first pair and the second pair are arranged such that differential FEXT from the input differential port to the output differential port are based on a difference between:
a sum of first single-ended scattering parameters from the first input port to the first output port, and a second single-ended scattering parameters from the second input port to the second output port; and
a sum of third single-ended scattering parameters from the first input port to the second output port, and a second single-ended scattering parameters from the second input port to the first output port.
13. The PCB of claim 11 , wherein the signal conductors are connected to an edge coupling via structure of the PCB configured to induce a positive differential FEXT.
14. The PCB of claim 11 , wherein the signal conductors are connected to a broadside coupling via structure of the PCB configured to induce a negative differential FEXT.
15. The PCB of claim 11 , wherein the PCB is coupled to the signal conductors by a surface mount.
16. The PCB of claim 11 , wherein the PCB is coupled to the signal conductors by a ball grid array (BGA).