Always-available embedded theft reaction subsystem

1. A system comprising:

a circuit board having a processor and core subsystem to support a plurality of logic including:

an arming logic to move a platform to an armed mode when receiving an arming command, wherein in the armed mode data of the platform is to be encrypted and the platform is to monitor for a suspicion trigger of movement by an accelerometer directly coupled to the processor and core subsystem through an encrypted and authenticated connection,

a disarming logic to move the platform to an unarmed mode when receiving a disarming command, the disarming logic active while the platform is in a low power state, wherein the low power state is one of at least hibernate and standby, and wherein the disarming command comprises an indication of a presence of an authorized user determined based on a proximity sensing of a paired user-carried device, and

a power transition logic to move the system from the low power state to an ON state in response to a user request, the power transition logic to present a log-in screen when the platform is armed, and to move the platform to the ON state without a log-in screen when the platform is unarmed.

2. The system of claim 1 , wherein the arming logic moves the system to the armed mode only when the disarming logic does not indicate the presence of the authorized user.

3. The system of claim 1 , wherein the power transition logic uses a Basic Input Output System (BIOS) to move the system from the low power state to the ON state.

4. The system of claim 3 , wherein the low power state is a hibernation state.

5. The system of claim 1 , wherein the power transition logic uses resume logic within the operating system to move the system from the low power state to the ON state.

6. The system of claim 5 , wherein the low power state is a standby state, or a connected standby state.

7. The system of claim 1 , further comprising: communication logic to send accelerometer data to a third party.

8. A system comprising:

a circuit board having a processor and core subsystem to support a plurality of logic including:

a power transition logic to move a platform to a reduced power state, the reduced power state selected from among a standby state, a connected standby state, a hibernate state, wherein the power transition logic to move the system from the low power state to an ON state in response to a user request,

an arming logic to move a platform to an armed mode when receiving an arming command, wherein in the armed mode data of the platform is to be encrypted and the platform is to monitor for a suspicion trigger of movement by an accelerometer directly coupled to the processor and core subsystem through an encrypted and authenticated connection,

a disarming logic to disarm the system in response to receiving a disarming command, regardless of the power state, wherein the disarming command comprises an indication of a presence of an authorized user determined based on a proximity sensing of a paired user-carried device, and

the power transition logic to force user authentication when the platform is in the armed mode, and to eliminate user authentication when the platform is disarmed.

9. The system of claim 8 , further comprising: an arming logic to move the system to the armed mode in response to an arming command.

10. The system of claim 8 , wherein the power transition logic uses a Basic Input Output System (BIOS) to move the system from the low power state to the ON state when the low power state is a hibernation state.

11. The system of claim 8 , wherein the power transition logic uses resume logic within the operating system to move the system from the low power state to the ON state when the low power state is a standby state, or a connected standby state.