IP Library Granted Patent US 9,575,607
Granted Patent B2
US 9,575,607 · App. 14/622,357 · Granted Feb 21, 2017

Electrode of self-capacitive touch panel utilizing serpentine trace to increase resistance

Inventors: Guo-Kiang Hung (New Taipei, TW); Chien-Chuan Chen (Hsinchu County, TW); Chao-Yang Kuo (Hsinchu County, TW)
Assignee: MSTAR SEMICONDUCTOR, INC.
G06F3/044H05K1/11H05K1/167H05K2201/097H05K2201/09263H05K2201/09272H05K2201/09281H05K2201/09381H05K2201/09418H05K2201/10053
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Quick Facts
Patent No.
US 9,575,607
App. No.
14/622,357
Granted
Feb 21, 2017
Kind
B2
Abstract

An electrode of a self-capacitive touch panel is provided. The electrode, coupled to a control circuit of the self-capacitive touch panel via a conducting wire, includes: a serpentine portion, having a first side; a main portion, having a second side; and a connecting portion, connected to the first side and the second side to connect the serpentine portion and the main portion. A length of the connecting portion is smaller than a length of the first side and a length of the second side.

Claims (25)

1. A flat electrode of a single layer self-capacitive touch panel, coupled to a control circuit of the self-capacitive touch panel, the flat electrode comprising:

a main portion;

a first serpentine portion, coupled to the main portion and coplanar with the main portion, comprising a serpentine trace; and

a second serpentine portion, directly connected to the main portion while not directly connected to the first serpentine portion,

wherein the first serpentine portion increases a resistance of the electrode corresponding to the control circuit through the serpentine trace.

2. The flat electrode of a single layer self-capacitive touch panel according to claim 1 , wherein the first serpentine portion comprises a plurality of parallel sub-traces.

3. The flat electrode of a single layer self-capacitive touch panel according to claim 2 , wherein widths of the sub-traces are substantially equal, and a total length of the sub-traces is associated with the resistance of the electrode corresponding to the control circuit.

4. The flat electrode of the single layer self-capacitive touch panel according to claim 2 , wherein gaps between the sub-traces are substantially equal.

5. The flat electrode of the single layer self-capacitive touch panel according to claim 2 , wherein the self-capacitive touch panel further comprises another electrode adjacent to the electrode and coupled to the control circuit, the another electrode comprises a second serpentine portion, and a height of the first serpentine portion is substantially equal to a height of the second serpentine portion.

6. The flat electrode of the single layer self-capacitive touch panel according to claim 5 , wherein the second serpentine portion comprises a plurality of another parallel sub-traces, widths of the another sub-traces are substantially equal to the widths of the sub-traces, and gaps between the another sub-traces are substantially equal to the gaps between the sub-traces.

7. The flat electrode of the single layer self-capacitive touch panel according to claim 1 , wherein the single layer self-capacitive touch panel comprises a capacitor, the resistance of the electrode and the capacitor form a low-pass filter (LPF), and a cut-off frequency of the low-pass filter (LPF) is determined by adjusting the resistance of the electrode to filter out surges.

8. A flat electrode of the single layer self-capacitive touch panel, coupled to a control circuit of the self-capacitive touch panel, the flat electrode comprising:

a serpentine portion, having a first side;

a main portion, coplanar with the serpentine portion and having a second side;

a connecting portion, connected to the first side and the second side to connect the serpentine portion and the main portion; and

a first serpentine trace, directly connected to the main portion while not directly connected to the serpentine portion,

wherein a length of the connecting portion is smaller than lengths of the first side and the second side.

9. The flat electrode of the single layer self-capacitive touch panel according to claim 8 , wherein the first side and the second side are parallel.

10. The flat electrode of the single layer self-capacitive touch panel according to claim 8 , wherein the serpentine portion comprises a second serpentine trace.

11. The flat electrode of the single layer self-capacitive touch panel according to claim 10 , wherein the second serpentine trace comprises a plurality of sub-traces.

12. The flat electrode of the single layer self-capacitive touch panel according to claim 11 , wherein widths of the sub-traces are substantially equal, and a total length of the sub-traces is associated with a resistance of the electrode corresponding to the control circuit.

13. The flat electrode of the single layer self-capacitive touch panel according to claim 11 , wherein gaps between the sub-traces are substantially equal.

14. The flat electrode of the single layer self-capacitive touch panel according to claim 13 , wherein the self-capacitive touch panel further comprises another electrode adjacent to the electrode and coupled to the control circuit of the self-capacitive touch panel, the another electrode comprises a third serpentine trace, and a height of the third serpentine trace is substantially equal to a height of the second serpentine trace.

15. The flat electrode of the single layer self-capacitive touch panel according to claim 14 , wherein the third serpentine trace comprises a plurality of another sub-traces, widths of the another sub-traces are substantially equal to the width of the sub-traces, and gaps between the another sub-traces are substantially equal to gaps between the sub-traces.

16. The flat electrode of the single layer self-capacitive touch panel according to claim 8 , wherein the single layer self-capacitive touch panel comprises a capacitor, a resistance of the electrode and the capacitor form an LPF, and a cut-off frequency of the low-pass filter (LPF) is determined by adjusting the resistance of the electrode to filter out surges.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2018
From: MSTAR SEMICONDUCTOR, INC.
To: ILI TECHNOLOGY CORP.
Reel/Frame 047597/0116 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2015
From: HUNG, GUO-KIANG; CHEN, CHIEN-CHUAN; KUO, CHAO-YANG
To: MSTAR SEMICONDUCTOR, INC.
Reel/Frame 034962/0320 →
Priority Claims (2)
TW 103104837 A · Feb 14, 2014 · national
TW 103108588 A · Mar 12, 2014 · national
Continuity (1)
Related Publication 20150234497A1 · Aug 20, 2015