Methods for manufacturing and operating a semiconductor device
A method for manufacturing and operating a semiconductor device is disclosed. The semiconductor device includes a first capacitor node, a second capacitor node, a first capacitor electrode, a second capacitor electrode, a first switch and a second switch. The first switch is coupled between the first capacitor electrode and the first and second capacitor nodes such that the first switch has a first position that couples the first capacitor electrode to the first capacitor node and a second position that couples the first capacitor electrode to the second capacitor node. The second switch is coupled between the second capacitor electrode and the first and second capacitor nodes such that the second switch has a first position that couples the second capacitor electrode to the first capacitor node and a second position that couples the second capacitor electrode to the second capacitor node.
1. A method for driving a capacitor in a semiconductor component, the method comprising:
(a) generating a first voltage between a first node and a second node;
(b) for a first period of time, applying the first voltage to the capacitor by coupling a first capacitor electrode to the first node and coupling a second capacitor electrode to the second node, such that a voltage difference between the first and second capacitor electrodes is the first voltage;
(c) for a second period of time after the first period of time, applying the first voltage to the capacitor by coupling the first capacitor electrode to the second node and coupling the second capacitor electrode to the first node, such that the voltage difference between the first and second capacitor electrodes is the first voltage, wherein a first switch couples the first node to the first capacitor electrode in a first position and to the second capacitor electrode in a second position; and
(d) automatically repeating steps (b) and (c).
2. The method as claimed in claim 1 , wherein generating the first voltage comprises generating a pulsating DC voltage.
3. The method as claimed in claim 1 , wherein a first length of the first period of time and a second length of the second period of time are controlled by a control signal.
4. The method as claimed in claim 3 , wherein the control signal is generated whenever an operating voltage is applied to the semiconductor component.
5. The method as claimed in claim 3 , wherein the control signal is generated from an internal clock in the semiconductor component.
6. The method as claimed in claim 1 , wherein generating the first voltage comprises generating the first voltage wherein a potential at the first node is always greater than or equal to a potential at the second node.
7. The method as claimed in claim 6 , wherein generating the first voltage comprises generating a DC voltage.
8. The method as claimed in claim 1 , further comprising a second switch, wherein the second switch couples the second node to the first capacitor electrode in a third position and the to the second capacitor electrode in a fourth position, wherein the second switch is in the third position when the first switch is in the first position and wherein the second switch is in the fourth position when the first switch is in the second position.
9. The method as claimed in claim 1 , wherein a sum of the first periods of time and a sum of the second periods of time are approximately the same.
10. A method for driving a capacitor in a semiconductor component, the method comprising:
(a) generating a first voltage between a first node and a second node;
(b) for a first period of time, applying the first voltage to the capacitor by coupling a first capacitor electrode to the first node and coupling a second capacitor electrode to the second node, such that a voltage difference between the first and second capacitor electrodes is the first voltage;
(c) for a second period of time after the first period of time, applying the first voltage to the capacitor by coupling the first capacitor electrode to the second node and coupling the second capacitor electrode to the first node, such that the voltage difference between the first and second capacitor electrodes is the first voltage, wherein a first switch couples the first node to the first capacitor electrode in a first position and to the second capacitor electrode in a second position; and
(d) directly transitioning between steps (b) and (c), and between steps (c) and (b).
11. The method as claimed in claim 10 , wherein generating the first voltage comprises generating a pulsating DC voltage.
12. The method as claimed in claim 10 , wherein a first length of the first period of time and a second length of the second period of time are controlled by a control signal.
13. The method as claimed in claim 12 , wherein the control signal is generated whenever an operating voltage is applied to the semiconductor component.
14. The method as claimed in claim 12 , wherein the control signal is generated from an internal clock in the semiconductor component.
15. The method as claimed in claim 10 , wherein generating the first voltage comprises generating the first voltage wherein a potential at the first node is always greater than or equal to a potential at the second node.
16. The method as claimed in claim 15 , wherein generating the first voltage comprises generating a DC voltage.
17. The method as claimed in claim 10 , further comprising a second switch, wherein the second switch couples the second node to the first capacitor electrode in a third position and the to the second capacitor electrode in a fourth position, wherein the second switch is in the third position when the first switch is in the first position and wherein the second switch is in the fourth position when the first switch is in the second position.
18. The method as claimed in claim 10 , wherein a magnitude of time integrals of a voltage function of the first periods of time and a magnitude of time integrals of a voltage function of the second periods of time are approximately the same.
19. A method for driving a capacitor in a semiconductor component, the method comprising:
(a) determining a length of a first time period and a length of a second time period;
(b) applying a first voltage between a first node and a second node;
(c) during the first time period, applying the first voltage to the capacitor by using a first switch in a first position to couple a first capacitor electrode to the first node, and using a second switch in a third position to couple a second capacitor electrode to the second node;
(d) during the second time period, applying the first voltage to the capacitor by using the first switch in a second position to couple the first capacitor electrode to the second node, and using the second switch in a fourth position to couple the second capacitor electrode to the first node; and
(e) repeating steps (c) and (d).
20. The method of claim 19 , wherein determining the length of the first time period and the length of the second time period comprises:
determining a first magnitude of a time integral of a function of the first voltage across the capacitor for the first time period;
determining a second magnitude of the time integral of a function of the first voltage across the capacitor for the second time period; and
setting the first time period and the second time period to substantially equalize the first magnitude and the second magnitude.