IP Library Granted Patent US 9,647,019
Granted Patent B2
US 9,647,019 · App. 14/429,092 · Granted May 9, 2017

TFT and manufacturing method thereof, array substrate and manufacturing method thereof, X-ray detector and display device

Inventors: Huichao Gao (Beijing, CN); Zongmin Tian (Beijing, CN); Peng Li (Beijing, CN)
Assignees: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
H01L27/14612H01L27/1214H01L27/1222H01L27/1288H01L27/14614H01L27/14623H01L27/14658H01L29/458H01L29/66765H01L29/78618H01L29/78678
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Quick Facts
Patent No.
US 9,647,019
App. No.
14/429,092
Granted
May 9, 2017
Kind
B2
Abstract

A TFT and manufacturing method thereof, an array substrate and manufacturing method thereof, an X-ray detector and a display device are disclosed. The manufacturing method includes: forming a gate-insulating-layer thin film ( 3 ′), a semiconductor-layer thin film ( 4 ′) and a passivation-shielding-layer thin film ( 5 ′) successively; forming a pattern ( 5 ′) that includes a passivation shielding layer through one patterning process, so that a portion, sheltered by the passivation shielding layer, of the semiconductor-layer thin film forms a pattern of an active layer ( 4 a ′); and performing an ion doping process to a portion, not sheltered by the passivation shielding layer, of the semiconductor-layer thin film to form a pattern comprising a source electrode ( 4 c ′) and a drain electrode ( 4 b ′). The source electrode ( 4 c ′) and the drain electrode ( 4 b ′) are disposed on two sides of the active layer ( 4 a ′) respectively and in a same layer as the active layer ( 4 a ′). The manufacturing method can reduce the number of patterning processes and improve the performance of the thin film transistor in the array substrate.

Claims (21)

1. A thin film transistor, comprising a gate electrode, a source electrode, a drain electrode and an active layer, wherein the source electrode and the drain electrode are disposed on two sides of the active layer respectively, and the source electrode, the drain electrode and the active layer are disposed in a same layer; and the thin film transistor further comprises a passivation shielding layer, and a width of the passivation shielding layer and that of the active layer are substantially identical along a direction of a connecting line between the source electrode and the drain electrode, wherein along the direction of the connecting line between the source electrode and the drain electrode, a width of the active layer and that of the gate electrode are identical, and wherein the passivation shielding layer contacts said same layer from outside of said same layer.

2. The thin film transistor claimed as claim 1 , wherein the gate electrode is disposed below the active layer; or the gate electrode is disposed on the active layer.

3. A display device, comprising a thin film transistor claimed as claim 1 .

4. The thin film transistor as claim 1 , wherein the gate electrode is disposed below the active layer; or the gate electrode is disposed on the active layer.

5. An X-ray detector, comprising a thin film transistor claimed as claim 1 .

6. An array substrate, comprising: a substrate, a thin film transistor, a passivation layer and a first pixel electrode,

wherein the thin film transistor comprises a gate electrode, a source electrode, a drain electrode and an active layer, the source electrode and the drain electrode are disposed on two sides of the active layer respectively and in a same layer as the active layer, and the first pixel electrode is electrically connected to the drain electrode; and the thin film transistor further comprises a passivation shielding layer, and a width of the passivation shielding layer and that of the active layer are substantially identical along a direction of a connecting line between the source electrode and the drain electrode, wherein along the direction of the connecting line between the source electrode and the drain electrode, a width of the active layer and that of the gate electrode are identical, and wherein the passivation shielding layer contacts said same layer from outside of said same layer.

7. The array substrate claimed as claim 6 , wherein the gate electrode is disposed below the active layer; or the gate electrode is disposed on the active layer.

8. The array substrate claimed as claim 6 , further comprising: a photodiode and a second pixel electrode,

wherein an end of the photodiode is electrically connected to the source electrode, and another end of the photodiode is electrically connected to the second pixel electrode.

9. The array substrate claimed as claim 6 , wherein the gate electrode is disposed below the active layer; or the gate electrode is disposed on the active layer.

10. The array substrate claimed as claim 6 , further comprising: a photodiode and a second pixel electrode,

wherein an end of the photodiode is electrically connected to the source electrode, and another end of the photodiode is electrically connected to the second pixel electrode.

11. The array substrate claimed as claim 7 , further comprising: a photodiode and a second pixel electrode,

wherein an end of the photodiode is electrically connected to the source electrode, and another end of the photodiode is electrically connected to the second pixel electrode.

12. The array substrate claimed as claim 8 , further comprising a light blocking plate, wherein the light blocking plate and the gate electrode are disposed in a same layer, and the light blocking plate is disposed directly below the photodiode.

13. The array substrate claimed as claim 9 , further comprising: a photodiode and a second pixel electrode,

wherein an end of the photodiode is electrically connected to the source electrode, and another end of the photodiode is electrically connected to the second pixel electrode.

14. The array substrate claimed as claim 10 , further comprising a light blocking plate, wherein the light blocking plate and the gate electrode are disposed in a same layer, and the light blocking plate is disposed directly below the photodiode.

15. The array substrate claimed as claim 11 , further comprising a light blocking plate, wherein the light blocking plate and the gate electrode are disposed in a same layer, and the light blocking plate is disposed directly below the photodiode.

16. The array substrate claimed as claim 13 , further comprising a light blocking plate, wherein the light blocking plate and the gate electrode are disposed in a same layer, and the light blocking plate is disposed directly below the photodiode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2015
From: GAO, HUICHAO; TIAN, ZONGMIN; LI, PENG
To: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 035192/0139 →
Priority Claims (1)
CN 2013 1 0420395 · Sep 16, 2013 · national
Continuity (1)
Related Publication 20150270299A1 · Sep 24, 2015