Shallow trench isolation for semiconductor devices

1. A method of forming a structure comprising

selecting a semiconductor substrate having an upper surface;

forming a plurality of trenches having sidewalls and a bottom in said upper surface of said semiconductor substrate to form a plurality of semiconductor regions bounded by said plurality of trenches;

forming a liner layer on said sidewalls and said bottom of said trenches; and

substantially filling said plurality of trenches with an insulating material comprising columnar textured boron nitride, said substantially filling includes a process selected from the group consisting of pulsed plasma enhanced chemical vapor deposition (Pulsed PECVD) and plasma assisted atomic layer deposition (PAALD), said process operating with said semiconductor substrate at a temperature in a range from 150° C. to 400° C.

2. The method of claim 1 wherein said Pulsed PECVD process includes flowing B 2 H 6 , H 2 and N 2 into a chamber;

forming a first plasma in said chamber for a first time period;

terminating said plasma;

flushing said chamber for a second time period by flowing H 2 and N 2 into said chamber; and

forming a second plasma in said chamber for a third time period with H 2 and N 2 and without B 2 H 6 present.

3. The method of claim 1 further including repeating the process of claim 2 .

4. The method of claim 1 wherein said PAALD process includes flowing B 2 H 6 into a chamber for first time period;

flushing said chamber for a second time period by flowing a first gas selected from the group consisting of H 2 , N 2 , He and Ar,

introducing a nitriding gas into said chamber;

forming a plasma for a third time period; and

terminating said plasma.

5. The method of claim 4 further including flushing said chamber for a fourth time period by flowing said first gas; and

repeating the process of claim 4 .