IP Library Granted Patent US 9,703,699
Granted Patent B2
US 9,703,699 · App. 14/489,365 · Granted Jul 11, 2017

Hybrid-HDD policy for what host-R/W data goes into NAND

Inventors: Richard M. Ehrlich (Saratoga, CA); Eric R. Dunn (Cupertino, CA)
Assignee: Kabushiki Kaisha Toshiba
G06F12/0246G06F3/06G06F3/0613G06F3/0655G06F3/0679G06F3/0688G06F12/0238G06F2206/1014G06F2212/7201G06F2212/7202G06F2212/7207
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Quick Facts
Patent No.
US 9,703,699
App. No.
14/489,365
Granted
Jul 11, 2017
Kind
B2
Abstract

In a cache policy for a hybrid drive having a magnetic storage device and a non-volatile solid-state device, the hybrid drive is configured to write the most recent version of data associated with a logical block address to the non-volatile solid-state device when the logical block address is associated with previously written data and is overlapped by a subsequent disk write operation. Advantageously, the most recent version of data associated with the overlapped logical block address is stored in cache in the non-volatile solid-state device, even when the subsequent disk write operation results in the overlapped logical block address being trimmed from cache or otherwise invalidated. Consequently, data associated with the overlapped logical block address can be accessed more quickly than data written to the magnetic storage device.

Claims (17)

1. A data storage device comprising:

a magnetic storage device;

a non-volatile solid-state device; and

a controller configured to process one or more write commands from a host that includes a range of logical block addresses, including a first portion of the range followed sequentially by a second portion of the range, and write data associated with the logical block addresses in the range by (i) storing write data associated with the logical block addresses in the first portion of the range in the non-volatile solid-state device, (ii) prior to writing write data associated with the logical block addresses in the second portion of the range, determining that previously written data associated with one or more logical block addresses in the second portion of the range are stored in the non-volatile solid-state device, and in response thereto storing the write data associated with the one or more logical block addresses in the non-volatile solid-state device and invalidating the previously written data associated with the one or more logical block addresses, and (iii) determining that previously written data associated with remaining logical block addresses in the second portion of the range are not stored in the non-volatile solid-state device, and in response thereto, storing the write data associated with the remaining logical block addresses in the magnetic storage device.

2. The data storage device of claim 1 , wherein the write commands are parts of a sequential write stream.

3. The data storage device of claim 1 , wherein the non-volatile solid-state device includes a cache for the data storage device.

4. The data storage device of claim 1 , wherein the controller is further configured to determine that there is sufficient storage space available in the non-volatile solid-state device for the write data associated with the logical block addresses to be stored therein, and to store the write data associated with the logical block addresses in the non-volatile solid-state device upon determining that there is sufficient storage space.

5. The data storage device of claim 1 , wherein the range of logical block addresses includes a third portion that sequentially follows the second portion.

6. A method of operating a storage device having a magnetic storage device and a non-volatile solid-state device, the method comprising:

receiving one or more write commands from a host that includes a range of logical block addresses, including a first portion of the range followed sequentially by a second portion of the range, and write data associated with the logical block addresses in the range;

storing write data associated with the logical block addresses in the first portion of the range in the non-volatile solid-state device;

prior to writing write data associated with the logical block addresses in the second portion of the range, determining that previously written data associated with one or more logical block addresses in the second portion of the range are stored in the non-volatile solid-state device, and in response thereto, storing the write data associated with the one or more logical block addresses in the non-volatile solid-state device and invalidating the previously written data associated with the one or more logical block addresses; and

determining that previously written data associated with remaining logical block addresses in the second portion of the range are not stored in the non-volatile solid-state device, and in response thereto, storing the write data associated with the remaining logical block addresses in the magnetic storage device.

7. The method of claim 6 , wherein the write commands are parts of a sequential write stream.

8. The method of claim 6 , wherein the non-volatile solid-state device includes a cache for the method.

9. The method of claim 6 , further comprising determining that there is sufficient storage space available in the non-volatile solid-state device for the write data associated with the logical block addresses to be stored therein, and storing the write data associated with the logical block addresses in the non-volatile solid-state device upon determining that there is sufficient storage space.

10. The method of claim 6 , wherein the range of logical block addresses includes a third portion that sequentially follows the second portion.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2014
From: EHRLICH, RICHARD M.; DUNN, ERIC R.
To: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Reel/Frame 033762/0201 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2014
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 033762/0249 →
Continuity (1)
Related Publication 20160077962A1 · Mar 17, 2016