Parallelized network traffic flow availability simulation using stochastic process and traffic engineering algorithms
The present disclosure provides a probabilistic framework that can calculate the probability of fulfilling demands for a given set of traffic flows. In some implementations, the probability of fulfilling demands can be based on the probability of infrastructure component failures, shared risk link groups derived from a cross-layer network topology, and traffic engineering (TE) considerations. The consideration of the cross-layer network topology enables the systems and methods described herein to account for the relationship between the physical and logical topologies.
1. A processor implemented method for determining traffic flow availability, the method comprising:
receiving by a processor an indication of a physical topology comprising a plurality of physical links, a logical topology comprising a plurality of logical links between a plurality of nodes, and a plurality of traffic flow demands;
receiving an indication of an average failure probability for each of the plurality of physical links; receiving a cross-layer network model that maps the logical topology to the physical topology; iteratively, for a predetermined number of cycles:
generating a failure sample, responsive to the indication of the average failure probability, indicating a failure of a plurality of physical links in the physical topology; updating the logical topology model responsive to the failure of the plurality of physical links in the failure sample and the cross-layer network model, wherein updating the logical topology model comprises calculating a capacity degradation for each of the plurality of logical links responsive to the failure sample; and
determining, with a traffic engineering simulator, if the updated logical topology model is capable of satisfying the plurality of traffic flow demands;
calculating an average availability for a fraction of a flow demand from the plurality of traffic flow demands; and outputting the calculated average flow availabilities.
2. The method of claim 1 , wherein the failure sample indicates a random failure of the plurality of physical links in the physical topology.
3. The method of claim 1 , further comprising:
receiving a failure rate and a repair rate for each of the plurality of physical links; and generating the failure sample response to the failure rate and the repair rate for each of the plurality of physical links.
4. The method of claim 1 , further comprising calculating an average availability of each of the plurality of traffic flow demands with a Monte Carlo simulation.
5. The method of claim 4 , further comprising determining if the average availability of the plurality of traffic flow demands satisfies a service level objective (SLO).
6. The method of claim 1 , further comprising determining if a latency of a plurality of traffic flow demands satisfies a SLO.
7. The method of claim 1 , further comprising calculating an average availability of each of the plurality of traffic flow demands across the predetermined number of cycles.
8. The method of claim 1 , wherein the failure sample comprises at least one failure with a known root cause and at least one failure without a known root cause.
9. The method of claim 1 , further comprising determining a distribution of durations of the plurality of traffic flow demands is not met.
10. The method of claim 1 , wherein each of the predetermined number of cycles are computed in parallel by different processors.
11. A system for determining traffic flow availability, the system comprising a non-transitory storage medium storing processor executable instructions and at least one processor coupled to the storage medium, wherein execution of the processor executable instructions causes the at least one processor to: receive an indication of a physical topology comprising a plurality of physical links, a logical topology comprising a plurality of logical links between a plurality of nodes, and a plurality of traffic flow demands;
receive an indication of an average failure probability for each of the plurality of physical links; receive a cross-layer network model that maps the logical topology to the physical topology; iteratively, for a predetermined number of cycles: generate a failure sample, responsive to the indication of the average failure probability, indicating a failure of a plurality of physical links in the physical topology;
update the logical topology model responsive to the failure of the plurality of physical links in the failure sample and the cross-layer network model, wherein updating the logical topology model comprises calculating a capacity degradation for each of the plurality of logical links responsive to the failure sample; and
determine, with a traffic engineering simulator, if the updated logical topology model is capable of satisfying the plurality of traffic flow demands; calculate an average availability for a fraction of a flow demand from the plurality of traffic flow demands; and
output the calculated average flow availabilities.
12. The system of claim 11 , wherein the failure sample indicates a random failure of the plurality of physical links in the physical topology.
13. The system of claim 11 , wherein execution of the processor executable instructions further causes the at least one processor to:
receive a failure rate and a repair rate for each of the plurality of physical links; and generate the failure sample response to the failure rate and the repair rate for each of the plurality of physical links.
14. The system of claim 11 , wherein execution of the processor executable instructions further causes the at least one processor to calculate an average availability of each of the plurality of traffic flow demands with a Monte Carlo simulation.
15. The system of claim 14 , wherein execution of the processor executable instructions further causes the at least one processor to determine if the average availability of the plurality of flows satisfies a service level objective (SLO).
16. The system of claim 11 , wherein execution of the processor executable instructions further causes the at least one processor to determine if a latency of a plurality of traffic flow demands satisfies a SLO.
17. The system of claim 11 , wherein execution of the processor executable instructions further causes the at least one processor to calculate an average availability of each of the plurality of traffic flow demands across the predetermined number of cycles.
18. The system of claim 11 , wherein the failure sample comprises at least one failure with a known root cause and at least one failure without a known root cause.
19. The system of claim 11 , wherein execution of the processor executable instructions further causes the at least one processor to determine a distribution of durations of the plurality of traffic flow demands is not met.
20. The system of claim 11 , execution of the processor executable instructions further causes the at least one processor to execute the predetermined number of cycles in parallel.
21. A non-transitory computer readable medium comprising processor executable instructions stored thereon, the instructions when executed by at least one processor cause the at least one processor to:
receive an indication of a physical topology comprising a plurality of physical links, a logical topology comprising a plurality of logical links between a plurality of nodes, and a plurality of traffic flow demands;
receive an indication of an average failure probability for each of the plurality of physical links;
receive a cross-layer network model that maps the logical topology to the physical topology;
iteratively, for a predetermined number of cycles: generate a failure sample, responsive to the indication of the average failure probability, indicating a failure of a plurality of physical links in the physical topology; update the logical topology model responsive to the failure of the plurality of physical links in the failure sample and the cross-layer network model, wherein updating the logical topology model comprises calculating a capacity degradation for each of the plurality of logical links responsive to the failure sample; and
determine, with a traffic engineering simulator, if the updated logical topology model is capable of satisfying the plurality of traffic flow demands;
calculate an average availability for a fraction of a flow demand from the plurality of traffic flow demands; and
output the calculated average flow availabilities.
22. The computer readable medium of claim 21 , wherein the failure sample indicates a random failure of the plurality of physical links in the physical topology.
23. The computer readable medium of claim 21 , wherein execution of the processor executable instructions further causes the at least one processor to: receive a failure rate and a repair rate for each of the plurality of physical links; and generate the failure sample response to the failure rate and the repair rate for each of the plurality of physical links.
24. The computer readable medium of claim 21 , wherein execution of the processor executable instructions further causes the at least one processor to calculate an average availability of each of the plurality of traffic flow demands with a Monte Carlo simulation.
25. The computer readable medium of claim 24 , wherein execution of the processor executable instructions further causes the at least one processor to determine if the average availability of the plurality of flows satisfies a service level objective (SLO).
26. The computer readable medium of claim 21 , wherein execution of the processor executable instructions further causes the at least one processor to determine if a latency of a plurality of traffic flow demands satisfies a SLO.
27. The computer readable medium of claim 21 , wherein execution of the processor executable instructions further causes the at least one processor to calculate an average availability of each of the plurality of traffic flow demands across the predetermined number of cycles.
28. The computer readable medium of claim 21 , wherein the failure sample comprises at least one failure with a known root cause and at least one failure without a known root cause.
29. The computer readable medium of claim 21 , wherein execution of the processor executable instructions further causes the at least one processor to execute the predetermined number of cycles in parallel.
30. The computer readable medium of claim 21 , wherein execution of the processor executable instructions further causes the at least one processor to determine a distribution of durations of the plurality of traffic flow demands is not met.