IP Library Granted Patent US 9,722,774
Granted Patent B2
US 9,722,774 · App. 14/699,354 · Granted Aug 1, 2017

Non-leaky helper data: extracting unique cryptographic key from noisy F-PUF fingerprint

Inventors: Michael Kara-Ivanov (Ramat Gan, IL); Vadim Bugaenko (Ramat Gan, IL); Yaron Shany (Ramat Gan, IL); Jun Jin Kong (Yongin-si, KR); Shay Landis (Ramat Gan, IL); Shmuel Dashevsky (Ramat Gan, IL)
Assignee: Samsung Electronics Co., Ltd.
H04L9/002G06F21/44G06F21/73H04L9/0861H04L9/0866
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Quick Facts
Patent No.
US 9,722,774
App. No.
14/699,354
Granted
Aug 1, 2017
Kind
B2
Abstract

A method generating a cryptographic key and corresponding helper data includes measuring an analog value associated with a physical property of cells of a memory array; digitizing the measured analog value to generate the cryptographic key; quantizing the measured analog value to generate the corresponding non-leaky helper data.

Claims (48)

1. A method of generating a cryptographic key and corresponding helper data, the method comprising:

measuring an analog value associated with a physical property of cells of a memory array;

digitizing the measured analog value to generate the cryptographic key;

quantizing the measured analog value to generate the corresponding helper data by assigning the measured analog values to one of a plurality of quantiles based on a value thereof, the helper data having at least two different values, and the plurality of quantiles being associated with the helper data such that at least two of the plurality of quantiles that are associated with different digitized values of the measured analog value are associated with a same one of the at least two different values of the helper data; and

storing the helper data in a data register.

2. The method of claim 1 , wherein the helper data does not reveal information on the cryptographic key.

3. The method of claim 1 , wherein the measuring an analog value comprises:

applying a plurality of voltage pulses to a cell of the plurality of cells of the memory array; and

determining which one of the plurality of applied voltage pulses turns the cell on.

4. The method of claim 3 , wherein the applying a plurality of voltage pulses includes applying an incremental step pulse to the cell.

5. The method of claim 1 , wherein the memory array is a NAND flash memory array.

6. The method of claim 1 , wherein the physical property is respective threshold voltages of the cells of the memory array.

7. A method of reproducing a cryptographic key, the method comprising:

measuring an analog value associated with a physical property of cells of a memory array;

digitizing the measured analog value to generate an estimate of the cryptographic key; and

correcting the estimate of the cryptographic key using helper data associated with the cryptographic key to reproduce the cryptographic key, the helper data having at least two different values, and the correcting including determining which of a plurality of quantiles the measured analog value is associated with based on the helper data, each the plurality of quantiles being associated with the helper data such that at least two of the plurality of quantiles that are associated with different digitized values of the measured analog value are associated with a same one of the at least two different values of the helper data.

8. The method of claim 7 , wherein the helper data does not reveal information on the cryptographic key.

9. The method of claim 7 , wherein the correcting the estimate of the cryptographic key comprises:

determining if values of bits of the cryptographic key are associated with an incorrect subset based on the helper data; and

inverting the value of bits of the cryptographic key, if the determining determines that the values are associated with an incorrect subset to generate a refined estimate of the cryptographic key.

10. The method of claim 7 , further comprising:

applying an error correction code to the refined estimate of the cryptographic key to reproduce the cryptographic key.

11. The method of claim 7 , wherein the physical property is respective threshold voltages of the cells of the memory array.

12. The method of claim 7 , wherein the method further comprises:

authenticating a device containing the memory array using the cryptographic key.

13. A device configured to authenticate using a cryptographic key, the device comprising:

a memory array; and

a controller configured to,

measure an analog value associated with a physical property of cells of the memory array,

digitize the measured analog value to generate the cryptographic key,

quantize the measured analog value to generate the corresponding helper data by assigning the measured analog values to one of a plurality of quantiles based on a value thereof, the helper data having at least two different values, and the plurality of quantiles being associated with the helper data such that at least two of the plurality of quantiles that are associated with different digitized values of the measured analog value are associated with a same one of the at least two different values of the helper data, and

store the helper data in a data register.

14. The device of claim 13 , further comprising:

a pulse generator configured to apply a plurality of voltage pulses to a cell of the plurality of cells of the memory array, and wherein

the controller is configured to measure the analog value by determining which one of the plurality of applied voltage pulses turn the cell on.

15. The device of claim 13 , wherein the controller is further configured to,

remeasure an analog value associated with the physical property of the cells of the memory array,

digitize the remeasured analog value to generate an estimate of the cryptographic key, and

correct the estimate of the cryptographic key using the helper data associated with the cryptographic key to reproduce the cryptographic key.

16. The device of claim 13 , wherein

the physical property is respective threshold voltages of the cells of the memory array, and

the controller is configured to authenticate the device using the cryptographic key.

17. The device of claim 13 , wherein the memory array is a NAND flash memory array.

18. The device of claim 15 , wherein the helper data does not reveal information on the cryptographic key.

19. The device of claim 15 , wherein the controller is configured to correct the estimate of the cryptographic key by,

determining if values of bits of the cryptographic key are associated with an incorrect subset based on the helper data, and

inverting the value of bits of the cryptographic key, if the controller determines that the values are associated with an incorrect subset to generate a refined estimate of the cryptographic key.

20. The device of claim 19 , wherein the controller is configured to reproduce the cryptographic key by applying an error correction code to the refined estimate of the cryptographic key.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2015
From: KARA-IVANOV, MICHAEL; BUGAENKO, VADIM; SHANY, YARON; KONG, JUN JIN; LANDIS, SHAY; DASHEVSKY, SHMUEL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 035534/0459 →
Continuity (1)
Related Publication 20160323096A1 · Nov 3, 2016