Self-timed, event-driven neurosynaptic core controller
Embodiments of the invention relate to a system for controlling program execution. The system comprises an event-based core controller including a set of state-preserving elements. The core controller starts and stops the program execution based on one or more control signals. For each instruction of the program, the core controller triggers a target component to execute the instruction by generating and sending an instruction and/or a trigger pulse to the target component.
1. A system for controlling program execution, comprising:
an event-based core controller comprising:
a set of state-preserving elements; and
one or more asynchronous shift elements;
wherein the core controller starts and stops execution of a program based on one or more control signals; and
wherein, for each instruction of the program, the core controller triggers a target component to execute the instruction by generating and sending an instruction and/or a trigger pulse to the target component.
2. The system of claim 1 , wherein each pulse has a corresponding duration based on a delay element.
3. The system of claim 2 , wherein a duration of each pulse is programmable via the delay element.
4. The system of claim 1 , wherein, for each instruction of the program, the core controller waits for an acknowledgement from a target component triggered to execute the instruction before resuming the execution of the program.
5. The system of claim 1 , wherein one or more instructions of the program triggers the core controller to pause the execution of the program until the core controller receives a control signal to resume the execution of the program.
6. The system of claim 5 , wherein the core controller generates a status report indicating an error when the core controller receives a control signal to restart the execution of the program before a previous program has completed execution.
7. The system of claim 1 , wherein:
the core controller controls multiple synchronous components; and
the core controller controls the synchronous components via a clock signal.
8. The system of claim 1 , wherein:
the core controller controls multiple asynchronous components; and
the core controller controls each asynchronous component via a request and acknowledge signal handshake.
9. The system of claim 1 , wherein:
the core controller controls multiple synchronous components and multiple asynchronous components;
the core controller controls the synchronous components via a clock signal; and
the core controller controls each asynchronous component via a request and acknowledge signal handshake.
10. The system of claim 1 , wherein the program includes one or more instructions for updating neuronal states of multiple neurons.
11. The system of claim 1 , wherein each target component is a component of a neurosynaptic core circuit.
12. A method for controlling program execution, comprising:
starting and stopping execution of a program based on one or more control signals; and
for each instruction of the program, triggering a target component to execute the instruction by generating and sending an instruction and/or a trigger pulse to the target component;
wherein the execution of the program is controlled via an event-based core controller comprising:
a set of state-preserving elements; and
one or more asynchronous shift elements.
13. The method of claim 12 , further comprising:
for each instruction of the program, waiting for an acknowledgement from a target component triggered to execute the instruction before resuming the execution of the program.
14. The method of claim 12 , further comprising:
generating a status report indicating an error when a control signal to restart the execution of the program is received before a previous program has completed execution.
15. The method of claim 12 , further comprising:
controlling multiple synchronous components, wherein the synchronous components are controlled via a clock signal.
16. The method of claim 12 , further comprising:
controlling multiple asynchronous components, wherein each asynchronous component is controlled via a request and acknowledge signal handshake.
17. The method of claim 12 , further comprising:
controlling multiple synchronous components and multiple asynchronous components, wherein the synchronous components are controlled via a clock signal, and wherein each asynchronous component is controlled via a request and acknowledge signal handshake.
18. A computer program product for controlling program execution, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a computer to cause the computer to:
start and stop execution of a program based on one or more control signals; and
for each instruction of the program, trigger a target component to execute the instruction by generating and sending an instruction and/or a trigger pulse to the target component;
wherein the execution of the program is controlled via an event-based core controller comprising:
a set of state-preserving elements; and
one or more asynchronous shift elements.