IP Library Granted Patent US 9,769,081
Granted Patent B2
US 9,769,081 · App. 13/692,635 · Granted Sep 19, 2017

Buffer manager and methods for managing memory

Inventors: Alon Pais (D.N. Shimshom, IL); Nafea Bishara (San Jose, CA)
Assignee: Marvell World Trade Ltd.
H04L47/621G06F5/12G06F2205/106
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Quick Facts
Patent No.
US 9,769,081
App. No.
13/692,635
Filed
Dec 3, 2012
Granted
Sep 19, 2017
Kind
B2
Art Unit
2184
USPC
710/56
Abstract

Some of the embodiments of the present disclosure provide a method comprising managing a plurality of buffer addresses in a system-on-chip (SOC); and if a number of available buffer addresses in the SOC falls below a low threshold value, obtaining one or more buffer addresses from a memory, which is external to the SOC, to the SOC. Other embodiments are also described and claimed.

Claims (51)

1. A system comprising:

a network interface configured to receive data from a computer network;

a memory including a plurality of buffer locations, each buffer location of the plurality of buffer locations being identified by both a respective physical address and a respective virtual address, the virtual address of each buffer location being different from but corresponding to the respective physical address, each buffer location of the plurality of buffer locations being configured to store both (i) a respective buffered data from data received over the network interface and (ii) the respective virtual address that is used to identify the respective buffer location;

a processor unit configured to access buffered data stored in a respective buffer location using the respective virtual address that is used to identify the buffer location;

one or more client components, that are different from the processor unit, configured to access the buffered data stored in the respective buffer location using the respective physical address that is used to identify the buffer location, instead of using the respective virtual address that is used to identify the buffer location;

a buffer management unit comprising:

a first internal buffer pointer pool;

a second internal buffer pointer pool; and

a controller configured to:

monitor a number of unassigned buffer pointers in the internal buffer pointer pool,

in response to the number of unassigned buffer pointers in the internal buffer pointer pool falling below a low threshold value, allocate a first one or more buffer pointers from a first external buffer pointer pool to the first internal buffer pointer pool, ones of the first one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations,

monitor a number of unassigned buffer pointers in the second internal buffer pointer pool, and

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool falling below another low threshold value, allocate a second one or more buffer pointers from a second external buffer pointer pool to the second internal buffer pointer pool, ones of the second one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations.

2. The system of claim 1 , wherein the one or more client components are further configured to:

access a virtual address of a buffer location by (i) accessing the buffered data stored in the buffer location using the physical address that is used to identify the buffer location and (ii) identifying the virtual address of the buffer location from the accessed buffered data, the accessed buffered data comprising virtual address of the buffer location.

3. The system of claim 1 , wherein the controller is further configured to:

in response to the number of unassigned buffer pointers in the first internal buffer pointer pool exceeding a high threshold value, allocate a third one or more buffer pointers from the first internal buffer pointer pool to the first external buffer pointer pool.

4. The system of claim 3 , wherein the controller is further configured to:

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool exceeding another high threshold value, allocate a fourth one or more buffer pointers from the second internal buffer pointer pool to the second external buffer pointer pool.

5. The system of claim 4 , wherein:

the one or more client components comprises at least two client components; and

the first internal buffer pointer pool is associated with a first traffic flow originating from a first client component of the at least two client components, such that available buffer pointers from the first internal buffer pointer pool are assigned to data packets of the first traffic flow; and

the second internal buffer pointer pool is associated with a second traffic flow originating from a second client component of the at least two client components, such that available buffer pointers from the second internal buffer pointer pool are assigned to data packets of the second traffic flow.

6. The system of claim 1 , wherein:

the processor unit and the one or more client components are configured as a system on a chip; and

the memory is external to the system on a chip.

7. The system of claim 1 , wherein:

the processor unit, the memory and the one or more client components are configured as a system on a chip.

8. The system of claim 1 , wherein one of the one or more client components comprises the network interface.

9. The system of claim 1 , wherein:

each of the plurality of buffer locations is associated with a corresponding descriptor of a plurality of descriptors; and

a descriptor associated with a buffer location of the plurality of buffer locations includes the respective physical address and the respective virtual address of the corresponding buffer location.

10. A method comprising:

storing, in ones of a plurality of buffer locations, both (i) a respective buffered data and (ii) a respective virtual address, the virtual address being different from but corresponding to the physical address that is associated with the respective buffer location, wherein the buffered data is received over a network interface;

identifying ones of the plurality of buffer locations using both (i) a respective physical address associated with the buffer location and (ii) the respective virtual address associated with the buffer location;

accessing, by a processor unit, buffered data stored in a respective buffer location using the respective virtual address associated with the buffer location;

accessing, by a client component that is different from the processor unit, buffered data stored in the respective buffer location using the respective physical address associated with the buffer location, instead of using the respective virtual address associated with the buffer location; and

managing first and second internal buffer pointer pools, wherein managing the first and second internal buffer pointer pools comprises:

monitoring a number of unassigned buffer pointers in the first internal buffer pointer pool;

in response to the number of unassigned buffer pointers in the first internal buffer pointer pool falling below a low threshold value, allocating a first one or more buffer pointers from a first external buffer pointer pool to the first internal buffer pointer pool, ones of the first one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations;

monitoring a number of unassigned buffer pointers in the second internal buffer pointer pool; and

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool falling below another low threshold value, allocating a second one or more buffer pointers from a second external buffer pointer pool to the second internal buffer pointer pool, ones of the second one or more buffer pointers pointing to a corresponding buffer location of the plurality of buffer locations.

11. The method of claim 10 , further comprising:

accessing, by the client component, a virtual address of a buffer location by (i) accessing the buffered data stored in the buffer location using the physical address associated with the buffer location and (ii) identifying the virtual address of the buffer location from the accessed buffered data.

12. The method of claim 10 , wherein managing the first internal buffer pointer pool further comprises:

in response to the number of unassigned buffer pointers in the first internal buffer pointer pool exceeding a high threshold value, allocating a third one or more buffer pointers from the first internal buffer pointer pool to the first external buffer pointer pool.

13. The method of claim 12 , wherein managing the second internal buffer pointer pool further comprises:

in response to the number of unassigned buffer pointers in the second internal buffer pointer pool exceeding another high threshold value, allocating a fourth one or more buffer pointers from the second internal buffer pointer pool to the second external buffer pointer pool.

14. The method of claim 13 , wherein the client component is a first client component, the method further comprising:

associating the first internal buffer pointer pool with a first traffic flow originating from the first client component, such that available buffer pointers from the first internal buffer pointer pool are assigned to data packets of the first traffic flow; and

associating the second internal buffer pointer pool with a second traffic flow originating from a second client component, such that available buffer pointers from the second internal buffer pointer pool are assigned to data packets of the second traffic flow.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053475/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: MARVELL INTERNATIONAL LTD.
To: CAVIUM INTERNATIONAL
Reel/Frame 052918/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 29, 2020
From: MARVELL WORLD TRADE LTD.
To: MARVELL INTERNATIONAL LTD.
Reel/Frame 051778/0537 →
Continuity (4)
Continuation 13038266 · Mar 1, 2011
Provisional Application 61315327 · Mar 18, 2010
Provisional Application 61347947 · May 25, 2010
Related Publication 20130088965A1 · Apr 11, 2013