IP Library Granted Patent US 9,773,736
Granted Patent B2
US 9,773,736 · App. 14/607,708 · Granted Sep 26, 2017

Intermediate layer for copper structuring and methods of formation thereof

Inventors: Ravi Keshav Joshi (Villach, AT); Juergen Steinbrenner (Noetsch, AT); Christian Fachmann (Fuernitz, AT); Petra Fischer (Wernberg, AT); Roman Roth (Sattfendorf, AT)
Assignee: Infineon Technologies AG
H01L23/53238H01L21/32134H01L21/76885H01L24/00H01L21/32139H01L2924/0002
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Quick Facts
Patent No.
US 9,773,736
App. No.
14/607,708
Granted
Sep 26, 2017
Kind
B2
Abstract

A method of forming a metallization layer over a semiconductor substrate includes depositing a blanket layer of a diffusion barrier liner over an inter level dielectric layer, and depositing a blanket layer of an intermediate layer over the diffusion barrier liner. A blanket layer of a power metal layer including copper is deposited over the intermediate layer. The intermediate layer includes a solid solution of a majority element and copper. The intermediate layer has a different etch selectivity from the power metal layer. After depositing the power metal layer, structuring the power metal layer, the intermediate layer, and the diffusion barrier liner.

Claims (38)

1. A method of forming a metallization layer over a semiconductor substrate, the method comprising:

depositing a blanket layer of a diffusion barrier liner over an inter level dielectric layer;

depositing a blanket layer of an intermediate layer over the diffusion barrier liner;

depositing a blanket layer of a copper layer over the intermediate layer, wherein the intermediate layer comprises a solid solution of a majority element and copper, wherein the copper layer has a thickness between two microns to fifteen microns;

after depositing the copper layer, structuring the copper layer, the intermediate layer, and the diffusion barrier liner, wherein the intermediate layer has a different etch selectivity from the copper layer during the structuring of the copper layer using a first wet etch process; and

forming an under bump metallization layer over the copper layer after the structuring.

2. The method of claim 1 , wherein the majority element of the solid solution comprises one or more of aluminum, tungsten, titanium, nickel, manganese, molybdenum, tantalum, and silicon.

3. The method of claim 1 , wherein structuring the copper layer, the intermediate layer, and the diffusion barrier liner comprises:

forming an etch mask over the copper layer; and

etching the intermediate layer using a second wet etch process different than the first wet etch process.

4. The method of claim 3 , wherein the first wet etch process comprises using a mixture comprising phosphoric acid, nitric acid, and acetic acid, and wherein the second wet etch process comprises using hydrofluoric acid.

5. The method of claim 4 , wherein the phosphoric acid is a majority component in the first wet etch process.

6. A method of forming a metallization layer over a semiconductor substrate, the method comprising:

providing a wafer comprising a layer stack comprising a diffusion barrier liner, an intermediate layer comprising aluminum as a majority element, and a copper layer, wherein the copper layer is between ten microns and fifty microns thick;

using wet chemical etching, forming a metal line by etching the copper layer, the intermediate layer, and the diffusion barrier liner; and

forming an under bump metallization layer over the copper layer after the wet chemical etching.

7. The method of claim 6 , wherein a chemistry of the wet chemical etching comprises one or more of phosphoric acid, nitric acid, acetic acid, and hydrofluoric acid, wherein the copper layer is etched using a mixture comprising phosphoric acid, nitric acid, and acetic acid, and wherein the intermediate layer is etched using hydrofluoric acid.

8. The method of claim 7 , wherein the phosphoric acid is a majority component in the chemistry of the wet chemical etching.

9. The method of claim 6 , wherein the intermediate layer is an aluminum layer comprising aluminum and copper.

10. The method of claim 9 , wherein the aluminum layer comprises at least 50% aluminum by atomic percent.

11. The method of claim 6 , wherein the intermediate layer is an aluminum silicon copper layer comprising aluminum, silicon, and copper.

12. The method of claim 11 , wherein the aluminum silicon copper layer comprises at least 50% aluminum by atomic percent.

13. The method of claim 11 , wherein the aluminum silicon copper layer comprises between 1% to 3% silicon by atomic percent, and wherein the aluminum silicon copper layer comprises 0.1% to 1% copper by atomic percent.

14. The method of claim 6 , wherein the intermediate layer further comprises copper.

15. The method of claim 6 , wherein the diffusion barrier liner comprises titanium, titanium nitride, tantalum, tantalum nitride, tungsten, and combinations thereof.

16. A method of forming a metallization layer over a semiconductor substrate, the method comprising:

forming a layer stack comprising a diffusion barrier liner, an intermediate layer, and a copper layer, wherein the copper layer is between ten microns and fifty microns thick; and

forming a metal line by etching the copper layer and the intermediate layer continuously using a wet chemical etching process, wherein the wet chemical etching is selective between the intermediate layer and the copper layer, and wherein the diffusion barrier layer is a diffusion barrier to copper atoms from the copper layer; and

forming an under bump metallization layer over the copper layer after the wet chemical etching process.

17. The method of claim 16 , wherein forming the layer stack comprises:

sputtering atoms of aluminum, copper, and silicon to form the intermediate layer followed by sputtering copper atoms to form the copper layer.

18. The method of claim 17 , wherein a temperature of the sputtering of the atoms aluminum, copper, and silicon and the sputtering of copper atoms is between 200° C. to about 400° C.

19. The method of claim 16 , wherein a chemistry of the wet chemical etching process comprises one or more of phosphoric acid, nitric acid, acetic acid, and hydrofluoric acid, wherein the copper layer is etched using a mixture comprising phosphoric acid, nitric acid, and acetic acid, and wherein the intermediate layer is etched using hydrofluoric acid.

20. A method of forming a metallization layer over a semiconductor substrate, the method comprising:

providing a wafer comprising a layer stack comprising a diffusion barrier liner, an intermediate layer comprising one or more of nickel, manganese, molybdenum, tantalum, and silicon as a majority element, and a copper layer;

using wet chemical etching, forming a metal line by etching the copper layer, the intermediate layer, and the diffusion barrier liner; and

forming an under bump metallization layer over the copper layer after the wet chemical etching.

21. The method of claim 20 , wherein the copper layer is between ten microns and fifty microns thick.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2015
From: JOSHI, RAVI KESHAV; STEINBRENNER, JUERGEN; FACHMANN, CHRISTIAN; FISCHER, PETRA; ROTH, ROMAN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 034833/0635 →
Continuity (1)
Related Publication 20160218033A1 · Jul 28, 2016