Semiconductor device
To improve withstand capability of a semiconductor device during reverse recovery, provided is a semiconductor device including a semiconductor substrate having a first conduction type; a first region having a second conduction type that is formed in a front surface of the semiconductor substrate; a second region having a second conduction type that is formed adjacent to the first region in the front surface of the semiconductor substrate and has a higher concentration than the first region; a third region having a second conduction type that is formed adjacent to the second region in the front surface of the semiconductor substrate and has a higher concentration than the second region; an insulating film that covers a portion of the second region and the third region; and an electrode connected to the second region and the first region that are not covered by the insulating film.
1. A semiconductor device comprising:
a semiconductor substrate having a first conduction type;
a first region having a second conduction type that is formed in a front surface of the semiconductor substrate;
a second region having a second conduction type that is formed adjacent to the first region in the front surface of the semiconductor substrate and has a higher concentration than the first region;
a third region having a second conduction type that is formed adjacent to the second region in the front surface of the semiconductor substrate and has a higher concentration than the second region;
an insulating film that covers a portion of the second region and the third region; and
an electrode connected to the second region and the first region that are not covered by the insulating film;
wherein the first region, the second region, and the third region are arranged such that the first region is farthest from a termination region, the third region is closest to the termination region, and the second region is between the first region and the third region.
2. The semiconductor device according to claim 1 , wherein
the third region is longer than the second region in an arrangement direction that is a direction in which the first region, the second region, and the third region are arranged.
3. The semiconductor device according to claim 2 , wherein
length of the third region in the arrangement direction is greater than or equal to 100 μm.
4. The semiconductor device according to claim 2 , wherein
length of the second region in contact with the electrode is equal to length of the second region in contact with the insulating film in the arrangement direction.
5. The semiconductor device according to claim 2 , wherein
length of the second region in contact with the insulating film is greater than length of the second region in contact with the electrode in the arrangement direction.
6. The semiconductor device according to claim 2 , wherein
an impurity concentration of the first region is greater than or equal to 3.5×10 16 cm −3 and less than or equal to 4.5×10 16 cm −3 ,
an impurity concentration of the second region is greater than or equal to 1.0×10 17 cm −3 and less than or equal to 2.0×10 17 cm −3 , and
an impurity concentration of the third region is greater than or equal to 3.5×10 18 cm −3 and less than or equal to 4.5×10 18 cm −3 .
7. The semiconductor device according to claim 1 , wherein
the second region is p-type and an impurity concentration of the second region is higher than a hole concentration injected into the second region during reverse recovery.
8. The semiconductor device according to claim 1 , wherein
the second region is formed to a deeper position than the first region, as seen from the front surface of the semiconductor substrate.
9. The semiconductor device according to claim 1 , wherein
the third region is formed to a deeper position than the second region, as seen from the front surface of the semiconductor substrate.