Semiconductor device with protected sidewalls and methods of manufacturing thereof
A method of protecting sidewalls a plurality of semiconductor devices is disclosed. The method includes fabricating the plurality of semiconductor devices on a semiconductor wafer, etching to form a trench grid network on the backside of the semiconductor wafer. The trench grid network demarcate physical boundaries of each of the plurality of semiconductor devices. The method also includes depositing a protective layer on the backside and etching to remove the protective layer from horizontal surfaces and to singulate each of the plurality of semiconductor devices from the semiconductor wafer.
1. A method of protecting sidewalls of a plurality of semiconductor devices, the method comprising:
(a) fabricating the plurality of semiconductor devices on a semiconductor wafer;
(b) forming a plurality of contact pads on each of the plurality of semiconductor devices;
(c) forming an isolation layer to cover a surface of the semiconductor wafer;
(d) placing the semiconductor wafer on a carrier such that a backside of the semiconductor wafer is facing up and a front side is facing down and non-permanently affixed to the surface of the carrier
(e) etching to form a trench grid network on the backside of the semiconductor wafer, wherein the trench grid network demarcates physical boundaries of each of the plurality of semiconductor devices;
(f) depositing a protective layer on the backside; and
(g) etching to remove the protective layer from horizontal surfaces and to singulate each of the plurality of semiconductor devices from the semiconductor wafer.
2. The method of claim 1 , wherein the carrier includes a sticky foil.
3. The method of claim 1 , wherein the carrier includes a buffer wafer.
4. The method of claim 1 , wherein the protective layer is deposited in gaseous form.
5. The method of claim 1 , the protective layer is made of Parylene or polytetrafluoroethylene.
6. The method of claim 1 , wherein steps (a) to (g) are performed sequentially in the listed order.
7. A semiconductor device manufactured using an operation on a backside of a wafer, the operation comprising:
fabricating the plurality of semiconductor devices on a semiconductor wafer;
placing the semiconductor wafer on a carrier such that a backside of the semiconductor wafer is facing up and a front side is facing down and non-permanently affixed to the surface of the carrier
etching to form a trench grid network on the backside of the semiconductor wafer, wherein the trench grid network demarcates physical boundaries of each of the plurality of semiconductor devices;
depositing a protective layer on the backside; and
etching to remove the protective layer from horizontal surfaces and to singulate each of the plurality of semiconductor devices from the semiconductor wafer.
8. The semiconductor device of claim 7 , wherein the carrier includes a sticky foil.
9. The semiconductor device of claim 7 , wherein the carrier includes a buffer wafer.
10. The semiconductor device of claim 7 , wherein the operation further comprises forming an isolation layer and etching parts of the isolation layer to expose a surface of a plurality of contact pads.
11. The semiconductor device of claim 7 , wherein the protective layer is deposited in gaseous form.
12. The semiconductor device of claim 7 , the protective layer is made of Parylene or polytetrafluoroethylene.
13. A method of protecting sidewalls of a plurality of semiconductor devices, the method comprising:
(a) fabricating the plurality of semiconductor devices on a semiconductor wafer;
(b) forming a plurality of contact pads on each of the plurality of semiconductor devices;
(c) forming an isolation layer to cover a surface of the semiconductor wafer;
(d) placing the semiconductor wafer on a carrier such that a front side of the semiconductor wafer is facing up and a back side is facing down and non-permanently affixed to the surface of the carrier
(e) etching to form a trench grid network on the semiconductor wafer, wherein the trench grid network demarcates physical boundaries of each of the plurality of semiconductor devices;
(f) depositing a protective layer on the semiconductor wafer; and
(g) etching to remove the protective layer from horizontal surfaces and to singulate each of the plurality of semiconductor devices from the semiconductor wafer.
14. The method of claim 13 , wherein the carrier includes a sticky foil.
15. The method of claim 13 , wherein the carrier includes a buffer wafer.
16. The method of claim 13 , wherein the protective layer is deposited in gaseous form.
17. The method of claim 13 , the protective layer is made of Parylene or polytetrafluoroethylene.