IP Library Granted Patent US 9,854,270
Granted Patent B2
US 9,854,270 · App. 14/575,788 · Granted Dec 26, 2017

Device and method for scalable coding of video information

Inventors: Adarsh Krishnan Ramasubramonian (San Diego, CA); Fnu Hendry (Poway, CA); Ye-Kui Wang (San Diego, CA)
Assignee: QUALCOMM Incorporated
H04N19/597H04N19/463H04N19/52H04N19/70
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Quick Facts
Patent No.
US 9,854,270
App. No.
14/575,788
Granted
Dec 26, 2017
Kind
B2
Abstract

An apparatus configured to code video information includes a memory unit and a processor in communication with the memory unit. The memory unit is configured to store video information associated with a first video layer having a current picture. The processor is configured to process a first offset associated with the current picture, the first offset indicating a difference between (a) most significant bits (MSBs) of a first picture order count (POC) of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture.

Claims (50)

1. An apparatus configured to decode video information, the apparatus comprising:

a memory configured to store video data associated with a first video layer having a current picture; and

at least one processor in communication with the memory, the at least one processor configured to:

decode a picture order count (POC) most significant bit (MSB) cycle value in a bitstream, wherein the POC MSB cycle value is associated with the current picture and indicative of a difference between (a) MSBs of a first POC of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture, wherein the previous picture is a closer one of two pictures relative to the current picture in decoding order, the two pictures being (i) a previous POC-resetting picture in the first video layer indicating a POC reset and (ii) a previous instantaneous decoder refresh (IDR) picture in the first video layer;

determine whether the current picture is associated with a POC reset;

based on a determination that the current picture is associated with a POC reset, update POC values of all pictures in a decoded picture buffer (DPB) that are in the first video layer based on the POC MSB cycle value associated with the current picture;

based on a determination that the current picture is not associated with a POC reset, determine the MSBs of the second POC of the current picture based on the POC MSB cycle value associated with the current picture; and

decode the current picture in the bitstream.

2. The apparatus of claim 1 , wherein the current picture is one of a clean random access (CRA) picture or a broken link access (BLA) picture.

3. The apparatus of claim 1 , wherein a video parameter set associated with the first video layer includes a flag or syntax element that indicates whether the POC MSB cycle value is signaled in the bitstream in association with the current picture.

4. The apparatus of claim 1 , wherein the current picture is an IDR picture.

5. The apparatus of claim 1 , wherein the apparatus comprises a decoder, wherein the at least one processor is further configured to receive the POC MSB cycle value in association with the current picture in the bitstream.

6. The apparatus of claim 1 , wherein the apparatus comprises a device selected from a group consisting of: a computer, a notebook, a laptop computer, a tablet computer, a set-top box, a telephone handset, a smart phone, a smart pad, a television, a camera, a display device, a digital media player, a video gaming console, or an in-car computer.

7. A method of decoding video information, the method comprising:

decoding a picture order count (POC) most significant bit (MSB) cycle value in a bitstream, wherein the POC MSB cycle value is associated with a current picture in a first video layer and indicative of a difference between (a) MSBs of a first POC of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture, wherein the previous picture is a closer picture of two pictures relative to the current picture in decoding order, the two pictures being (i) a previous POC-resetting picture in the first video layer indicating a POC reset and (ii) a previous instantaneous decoder refresh (IDR) picture in the first video layer;

determining whether the current picture is associated with a POC reset;

performing one of (i) based on determining that the current picture is associated with a POC reset, updating POC values of all pictures in a decoded picture buffer (DPB) that are in the first video layer based on the POC MSB cycle value associated with the current picture, or (ii) based on determining that the current picture is not associated with a POC reset, determining the MSBs of the second POC of the current picture based on the POC MSB cycle value associated with the current picture; and

decoding the current picture in the bitstream.

8. The method of claim 7 , wherein the current picture is one of a clean random access (CRA) picture or a broken link access (BLA) picture.

9. The method of claim 7 , wherein a video parameter set associated with the first video layer includes a flag or syntax element that indicates whether the POC MSB cycle value is signaled in the bitstream in association with the current picture.

10. The method of claim 7 , wherein the current picture is an IDR picture.

11. A non-transitory computer readable medium comprising code that, when executed, causes an apparatus to:

store video data associated with a first video layer having a current picture;

decode a picture order count (POC) most significant bit (MSB) cycle value in a bitstream, wherein the POC MSB cycle value is associated with the current picture and indicative of a difference between (a) MSBs of a first POC of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture, wherein the previous picture is a closer picture of two pictures relative to the current picture in decoding order, the two pictures being (i) a previous POC-resetting picture in the first video layer indicating a POC reset and (ii) a previous instantaneous decoder refresh (IDR) picture in the first video layer;

determine whether the current picture is associated with a POC reset;

perform one of (i) update, based on a determination that the current picture is associated with a POC reset, POC values of all pictures in a decoded picture buffer (DPB) that are in the first video layer based on the POC MSB cycle value associated with the current picture, or (ii) determine, based on a determination that the current picture is not associated with a POC reset, the MSBs of the second POC of the current picture based on the POC MSB cycle value associated with the current picture; and

decode the current picture in the bitstream.

12. The computer readable medium of claim 11 , wherein the code further causes the apparatus to:

based on a determination that the current picture is associated with a POC reset, update POC values of all pictures in a decoded picture buffer (DPB) that are in the first video layer based on the POC MSB cycle value associated with the current picture.

13. A video coding device configured to decode video information, the video coding device comprising:

means for storing video data associated with a first video layer having a current picture;

means for decoding a picture order count (POC) most significant bit (MSB) cycle value in a bitstream, wherein the POC MSB cycle value is associated with the current picture and indicative of a difference between (a) MSBs of a first POC of a previous picture in the first video layer that precedes the current picture in decoding order and (b) MSBs of a second POC of the current picture, wherein the previous picture is a closer picture of two pictures relative to the current picture in decoding order, the two pictures being (i) a previous POC-resetting picture in the first video layer indicating a POC reset and (ii) a previous instantaneous decoder refresh (IDR) picture in the first video layer;

means for determining whether the current picture is associated with a POC reset;

means for performing one of (i) updating, based on a determination that the current picture is associated with a POC reset, POC values of all pictures in a decoded picture buffer (DPB) that are in the first video layer based on the POC MSB cycle value associated with the current picture, or (ii) determining, based on a determination that the current picture is not associated with a POC reset, the MSBs of the second POC of the current picture based on the POC MSB cycle value associated with the current picture; and

means for decoding the current picture in the bitstream.

14. The video coding device of claim 13 , further comprising:

means for updating, based on a determination that the current picture is associated with a POC reset, POC values of all pictures in a decoded picture buffer (DPB) that are in the first video layer based on the POC MSB cycle value associated with the current picture.

15. The apparatus of claim 1 ,

wherein the at least one processor is further configured to:

determine that at least one picture that follows a second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order; and

based on the determination that at least one picture that follows the second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order, refrain from indicating a POC reset in association with the second current picture.

16. The method of claim 7 , further comprising:

determining that at least one picture that follows a second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order; and

based on determining that at least one picture that follows the second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order, refraining from indicating a POC reset in association with the second current picture.

17. The computer readable medium of claim 11 , wherein the code further causes the apparatus to:

determine that at least one picture that follows a second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order; and

based on the determination that at least one picture that follows the second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order, refrain from indicating a POC reset in association with the second current picture.

18. The video coding device of claim 13 , the video coding device further comprising:

means for determining that at least one picture that follows a second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order; and

means for refraining, based on the determination that at least one picture that follows the second current picture in decoding order is to be output before at least one other picture that precedes the second current picture in decoding order, from indicating a POC reset in association with the second current picture.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2015
From: RAMASUBRAMONIAN, ADARSH KRISHNAN; HENDRY, FNU; WANG, YE-KUI
To: QUALCOMM INCORPORATED
Reel/Frame 034801/0235 →
Continuity (2)
Provisional Application 61918630 · Dec 19, 2013
Related Publication 20150181233A1 · Jun 25, 2015