IP Library Granted Patent US 9,898,623
Granted Patent B2
US 9,898,623 · App. 14/661,885 · Granted Feb 20, 2018

Method for performing an encryption with look-up tables, and corresponding encryption apparatus and computer program product

Inventor: Filippo Melzani (Burago di Molgora, IT)
Assignee: STMICROELECTRONICS S.R.L.
G06F21/72H04L9/002H04L9/0631H04L2209/046
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Quick Facts
Patent No.
US 9,898,623
App. No.
14/661,885
Granted
Feb 20, 2018
Kind
B2
Abstract

An encryption method includes accessing a look-up table (LUT) to implement countermeasures against side-channel attacks, such as embedding masks. The LUT is initialized by writing initialization values in the LUT by applying an address-mask to input data that identify a location of said LUT and a data-mask to data to be stored at a location of the LUT. The method includes carrying out an initialization of the LUT that includes providing at least one second address-mask and one second data-mask; and computing corresponding initialization values as a function of a logic combination of the aforesaid first address-mask and second address-mask and of a logic combination of the aforesaid first data-mask and second data-mask. In the resulting table the address data are masked only by the second address-mask and the data are masked only by the second data-mask. The structure of the LUT may allow convenient implementation by initializing all the values of the LUT in parallel in one cycle.

Claims (96)

1. A method, comprising:

initializing a look-up table of an electronic circuit using an iterative process, at least one of a plurality of iterations of the iterative process including:

applying a first of a plurality of address-masks to an unmasked address, generating a masked address;

applying a logical combination of the first of the plurality of address-masks and a second of the plurality of address-masks to the masked address, generating an address corresponding to application of the second address-mask of the plurality of address-masks to the unmasked address;

applying a first of a plurality of data-masks to unmasked data, generating masked data; and

applying a logical combination of the first of the plurality of data-masks and a second of the plurality of data masks to the masked data, generating data corresponding to application of the second data-mask of the plurality of data-masks to the unmasked data; and

using the initialized look-up table to perform a ciphering operation, wherein the ciphering operation is an Advanced Encryption Standard (AES) operation.

2. The method of claim 1 , comprising:

retrieving the logical combination of the first of the plurality of address-masks and the second of the plurality of address-masks, without retrieving or generating of the second of the plurality of address-masks by the electronic circuit; and

retrieving the logical combination of the first of the plurality of data-masks and the second of the plurality of data-masks, without retrieving or generating of the second of the plurality of data-masks by the electronic circuit.

3. The method of claim 1 wherein,

the logical combination of the first of the plurality of address-masks and the second of the plurality of address-masks is an exclusive OR (XOR) between values of the first of the plurality of address-masks and values of the second address-mask of the plurality of address-masks; and

the logical combination of the first of the plurality of data-masks and the second of the plurality of data-masks is an exclusive OR (XOR) between values of the first data-mask of the plurality of data-masks and values of the second data-mask of the plurality of data-masks.

4. The method of claim 1 wherein the initializing the look-up table comprises, in at least one iteration of the plurality of iterations,

applying, to a masked-address-result of a previous iteration, a logical combination of:

an address-mask of a logical combination of address-masks of the previous iteration; and

a subsequent address-mask of the plurality of address-masks, generating a masked-address-result of the iteration corresponding to application of the subsequent address-mask to the unmasked address; and

applying, to a masked-data-result of the previous iteration, a logical combination of:

a data-mask of a logical combination of data-masks of the previous iteration; and

a subsequent data-mask of the plurality of data-masks, generating a masked-data-result of the iteration corresponding to application of the subsequent data mask to the unmasked data.

5. The method of claim 4 , comprising selecting a number of the plurality of iterations.

6. The method of claim 1 wherein the AES operation comprises applying an Advanced Encryption Standard (AES) encryption procedure and a SubBytes operation of said AES encryption procedure includes the initializing of the look-up table.

7. The method of claim 6 , comprising:

using a selected one of a plurality of sets of logical combinations of address-masks in a first round of said AES encryption procedure; and

reusing the selected one of the plurality of sets of logical combinations of address-masks in another round of said AES encryption procedure, wherein the another round is separated from the first round by at least one round.

8. A device, comprising:

a look-up table; and

circuitry configured to initializing the look-up table using an iterative process, at least one of a plurality of iterations of the iterative process including:

applying a first of a plurality of address-masks to an unmasked address, generating a masked address;

applying a logical combination of the first of the plurality of address-masks and a second of the plurality of address-masks to the masked address, generating an address corresponding to application of the second of the plurality of address-masks to the unmasked address;

applying a first of a plurality of data-masks to unmasked data, generating masked data; and

applying a logical combination of the first of the plurality of data-masks and a second of the plurality of data-masks to the masked data, generating data corresponding to application of the second data-mask of the plurality of data-masks to the unmasked data, wherein the device, in operation, uses the initialized look-up table to perform an Advanced Encryption Standard (AES) operation.

9. The device of claim 8 wherein the circuitry is configured to:

retrieve the logical combination of the first and the second of the plurality of address-masks, without retrieving or generating of the second address mask of the plurality of address-masks; and

retrieve the logical combination of the first and the second of the plurality of data-masks, without retrieving or generating of the second of the plurality of data-masks.

10. The device of claim 8 wherein,

the logical combination of the first and the second of the plurality of address-masks is an exclusive OR (XOR) between values of the first address-mask and values of the second address-mask of the plurality of address-masks; and

the logical combination of the first and the second of the plurality of data-masks is an exclusive OR (XOR) between values of the first data-mask and values of the second data-mask of the plurality of data-masks.

11. The device of claim 8 wherein the circuitry is configured to initialize the look-up table by, in at least one iteration of the plurality of iterations,

applying, to a masked-address-result of a previous iteration, a logical combination of:

an address-mask of a logical combination of address-masks of the previous iteration; and

a subsequent address-mask of the plurality of address-masks, generating a masked-address-result of the iteration corresponding to application of the subsequent address-mask to the unmasked address; and

applying, to a masked-data-result of the previous iteration, a logical combination of:

a data-mask of a logical combination of data-masks of the previous iteration; and

a subsequent data-mask of the plurality of data-masks, generating a masked-data-result of the iteration corresponding to application of the subsequent data mask to the unmasked data.

12. The device of claim 11 wherein the circuitry is configured to select a number of the plurality of iterations.

13. The device of claim 8 wherein the circuitry is configured to perform an Advanced Encryption Standard (AES) ciphering procedure and a SubBytes operation of said AES ciphering procedure includes the initializing of the look-up table.

14. The device of claim 13 wherein the circuitry is configured to:

use a selected one of a plurality of sets of logical combinations of address-masks in a first round of said AES ciphering procedure; and

reuse the selected one of the plurality of sets of logical combinations of address-masks in another round of said AES ciphering procedure, wherein the another round is separated from the first round by at least one round.

15. The device of claim 14 , comprising an S-Box including the look-up table.

16. The device of claim 15 wherein the S-Box comprises a plurality of composite look-up tables each being smaller than the look-up table and the S-Box is configured to perform a non-linear operation in a finite field, using the plurality of composite look-up tables to implement said non-linear operation in a composite field of finite subfields deriving from said finite field.

17. The device of claim 16 wherein said composite look-up tables comprise a plurality of flip-flops and the S-Box is configured to initialize the flip-flops using logical combination of two of the plurality of address-masks and logical combination of two of the plurality of data-masks.

18. The device of claim 8 wherein the circuitry is configured to apply the logical combination of the first and the second of the plurality of address-masks to the masked address and to apply the logical combination of the first and the second of the plurality of data-masks to masked data in a single clock cycle.

19. A system, comprising:

one or more terminals to receive and output data; and

security circuitry coupled to the one or more interfaces and including an S-Box configured to initializing one or more look-up tables using an iterative process, at least one of a plurality of iterations of the iterative process including:

applying a first of a plurality of address-masks to an unmasked address, generating a masked address;

applying a logical combination of the first address-mask of the plurality of address-masks and a second address mask of the plurality of address-masks to the masked address, generating an address corresponding to application of the second address-mask of the plurality of address-masks to the unmasked address;

applying a first of a plurality of data-masks to unmasked data, generating masked data; and

applying a logical combination of the first of the plurality of data-masks and a second data-mask of the plurality of data-masks to the masked data, generating data corresponding to application of the second data-mask of the plurality of data-masks to the unmasked data, wherein the one or more initialized look-up tables are used by the S-Box to perform an Advanced Encryption Standard (AES) operation.

20. The system of claim 19 wherein the security circuitry is configured to:

retrieve the logical combination of the first and second address-masks of the plurality of address-masks, without retrieving or generating of the second address-mask of the plurality of address-masks; and

retrieve the logical combination of the first and second data-masks of the plurality of data-masks, without retrieving or generating of the second data-mask of the plurality of data-masks.

21. The system of claim 19 wherein the S-Box is configured to, in at least one iteration of the plurality of iterations,

apply, to a masked-address-result of a previous iteration, a logical combination of:

an address-mask of a logical combination of address-masks of the previous iteration; and

a subsequent address-mask of the plurality of address-masks, generating a masked-address-result of the iteration corresponding to application of the subsequent address-mask to the unmasked address; and

apply, to a masked-data-result of the previous iteration, a logical combination of:

a data-mask of a logical combination of data-masks of the previous iteration; and

a subsequent data-mask of the plurality of data-masks, generating a masked-data-result of the iteration corresponding to application of the subsequent data mask to the unmasked data.

22. The system of claim 19 wherein the S-Box is configured to:

use a selected one of a plurality of sets of logical combinations of address-masks in a first round of an Advanced Encryption Standard (AES) ciphering procedure; and

reuse the selected one of the plurality of sets of logical combinations of address-masks in another round of said AES ciphering procedure, wherein the another round is separated from the first round by at least one round.

23. The system of claim 19 , comprising at least one of:

set-top box control circuitry; and

smart-card control circuitry.

24. A non-transitory computer-readable medium having contents which configure an Advanced Encryption Standard (AES) system to perform a method, the method comprising:

initializing one or more look-up tables using an iterative process, at least one of a plurality of iterations of the iterative process including:

applying a first address-mask of a plurality of address-masks to an unmasked address, generating a masked address;

applying a logical combination of the first address-mask and a second address-mask of the plurality of address-masks to the masked address, generating an address corresponding to application of the second address-mask of the plurality of address-masks to the unmasked address; and

applying a first data-mask of a plurality of data-masks to an unmasked data, generating masked data;

applying a logical combination of the first data-mask and a second data-mask of the plurality of data-masks to the masked data, generating data corresponding to application of the second data-mask of the plurality of data-masks to the unmasked data.

25. The medium of claim 24 wherein the method comprises:

retrieving the logical combination of the first and second address-masks of the plurality of address-masks, without retrieving or generating of the second address-mask of the plurality of address-masks; and

retrieving the logical combination of the first and second data-masks of the plurality of data-masks, without retrieving or generating of the second data-mask of the plurality of data-masks.

26. The medium of claim 24 wherein at least one iteration of the plurality of iterations includes,

applying, to a masked-address-result of a previous iteration, a logical combination of:

an address-mask of a logical combination of address-masks of the previous iteration; and

a subsequent address-mask of the plurality of address-masks, generating a masked-address-result of the iteration corresponding to application of the subsequent address-mask to the unmasked address; and

applying, to a masked-data-result of the previous iteration, a logical combination of:

a data-mask of a logical combination of data-masks of the previous iteration; and

a subsequent data-mask of the plurality of data-masks, generating a masked-data-result of the iteration corresponding to application of the subsequent data mask to the unmasked data.

27. The medium of claim 24 wherein the method comprises:

using a selected one of a plurality of sets of logical combinations of address-masks in a first round of an AES ciphering procedure; and

reusing the selected one of the plurality of sets of logical combinations of address-masks in another round of said AES ciphering procedure, wherein the another round is separated from the first round by at least one round.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 1, 2022
From: STMICROELECTRONICS S.R.L.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 061828/0243 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2015
From: MELZANI, FILIPPO
To: STMICROELECTRONICS S.R.L.
Reel/Frame 035210/0584 →
Priority Claims (2)
IT TO2014A0267 · Mar 31, 2014 · national
IT TO2014A0268 · Mar 31, 2014 · national
Continuity (1)
Related Publication 20150278555A1 · Oct 1, 2015