Computing device, data transfer method between coprocessor and non-volatile memory, and computer-readable recording medium

1. A computing device comprising:

a central processing unit (CPU);

a CPU memory for the CPU;

a non-volatile memory;

a coprocessor using the non-volatile memory;

a coprocessor memory configured to store data to be processed by the coprocessor or data processed by the coprocessor; and

a recording medium including a controller driver for the non-volatile memory and a library that are executed by the CPU, the controller driver being configured to map the coprocessor memory to a system memory block of the CPU memory and the library being configured to move data between the coprocessor and the non-volatile memory via the system memory block mapped to the coprocessor memory,

wherein the system memory block includes a memory-mapped register and a pinned memory space mapped to the coprocessor memory, and

wherein the memory-mapped register is managed by the controller driver and includes a plurality of entries for pointing addresses of the pinned memory space.

2. The computing device of claim 1 , wherein a start offset of the system memory block is indicated by a base address register of an interface connecting the non-volatile memory with the CPU.

3. The computing device of claim 1 , wherein each entry points a logical block address of a space with a predetermined size in the pinned memory space, and the logical block address is mapped to a physical block address of a space with a predetermined size in the coprocessor memory.

4. The computing device of claim 3 , wherein, when the coprocessor reads data from the non-volatile memory, the controller driver transfers the data from the non-volatile memory to the space of the physical block address that is mapped to the logical block address pointed by a corresponding entry.

5. The computing device of claim 3 , wherein the non-volatile memory is connected to the CPU through a non-volatile memory express (NVMe) protocol, and

wherein each entry is a physical region page (PRP) entry.

6. The computing device of claim 3 , wherein the non-volatile memory is connected to the CPU through an advanced host controller interface (AHCI) protocol, and

wherein each entry is a physical region descriptor table (PRDT) entry.

7. The computing device of claim 1 , wherein the library resides above an application and a native file system in a software stack.

8. A method of transferring data between a coprocessor and a non-volatile memory in a computing device, the method comprising:

mapping a coprocessor memory for the coprocessor to a system memory block of a CPU memory for a CPU; and

moving data between the coprocessor and the non-volatile memory via the system memory block mapped to the coprocessor memory,

wherein the system memory block includes a memory-mapped register and a pinned memory space mapped to the coprocessor memory, and

wherein the memory-mapped register is managed by a controller driver for the non-volatile memory and includes a plurality of entries for pointing addresses of the pinned memory space.

9. The method of claim 8 , wherein a start offset of the system memory block is indicated by a base address register of an interface connecting the non-volatile memory with the CPU.

10. The method of claim 8 , wherein each entry points a logical block address of a space with a predetermined size in the pinned memory space, and the logical block address is mapped to a physical block address of a space with a predetermined size in the coprocessor memory.

11. The method of claim 10 , wherein, when the coprocessor reads data from the non-volatile memory, moving the data includes transferring the data from the non-volatile memory to the space of the physical block address that is mapped to the logical block address pointed by a corresponding entry.

12. The method of claim 10 , wherein the non-volatile memory is connected to the CPU through a non-volatile memory express (NVMe) protocol, and

wherein each entry is a physical region page (PRP) entry.

13. The method of claim 10 , wherein the non-volatile memory is connected to the CPU through an advanced host controller interface (AHCI) protocol, and

wherein each entry is a physical region descriptor table (PRDT) entry.

14. A non-transitory computer-readable recording medium that stores a program to be executed by a computing device including a CPU, a CPU memory for the CPU, a non-volatile memory, a coprocessor using the non-volatile memory, and a coprocessor memory configured to store data to be processed by the coprocessor or data processed by the coprocessor, the program comprising:

a controller driver for the non-volatile memory configured to map the coprocessor memory to a system memory block of the CPU memory; and

a library configured to move data between the coprocessor and the non-volatile memory via the system memory block mapped to the coprocessor memory,

wherein the system memory block includes a memory-mapped register and a pinned memory space mapped to the coprocessor memory, and

wherein the memory-mapped register is managed by the controller driver and includes a plurality of entries for pointing addresses of the pinned memory space.

15. The non-transitory computer-readable recording medium of claim 14 , wherein a start offset of the system memory block is indicated by a base address register of an interface connecting the non-volatile memory with the CPU.

16. The non-transitory computer-readable recording medium of claim 14 , wherein each entry points a logical block address of a space with a predetermined size in the pinned memory space, and the logical block address is mapped to a physical block address of a space with a predetermined size in the coprocessor memory.

17. The non-transitory computer-readable recording medium of claim 16 , wherein, when the coprocessor reads data from the non-volatile memory, the controller driver transfers the data from the non-volatile memory to the space of the physical block address that is mapped to the logical block address pointed by a corresponding entry.