Hetero-junction bipolar transistor and electric device
This hetero-junction bipolar transistor includes a first n-type GaN layer, an Al x Ga 1-x N layer (0.1≤x≤0.5), an undoped GaN layer having a thickness of not less than 20 nm, a Mg-doped p-type GaN layer having a thickness of not less than 100 nm, and a second n-type GaN layer which are sequentially stacked. The first n-type GaN layer and the Al x Ga 1-x N layer form an emitter, the undoped GaN layer and the p-type GaN layer form a base, and the second n-type GaN layer forms a collector. During non-operation, two-dimensional hole gas is formed in a part of the undoped GaN layer near the hetero interface between the Al x Ga 1-x N layer and the undoped GaN layer. When the thickness of the p-type GaN layer is b [nm], the hole concentration of the p-type GaN layer is p [cm −3 ], and the concentration of the two-dimensional hole gas is P s [cm −2 ], p×b×10 −7 +P s ≥1×10 13 [cm −2 ] is satisfied.
1. A hetero-junction bipolar transistor, comprising:
a first n-type GaN layer;
an Al x Ga 1-x N layer (0.1≤x≤0.5) on the first n-type GaN layer;
an undoped GaN layer having a thickness of not less than 20 nm on the Al x Ga 1-x N layer;
a Mg-doped p-type GaN layer having a thickness of not less than 100 nm on the undoped GaN layer;
a second n-type GaN layer on the p-type GaN layer;
an emitter electrode electrically connected to the first n-type GaN layer;
a base electrode electrically connected to the p-type GaN layer; and
a collector electrode electrically connected to the second n-type GaN layer,
an emitter being formed by the first n-type GaN layer and the Al x Ga 1-x N layer, a base being formed by the undoped GaN layer and the p-type GaN layer and a collector being formed by the second n-type GaN layer,
two-dimensional hole gas being formed in a part of the undoped GaN layer near the hetero interface between the Al x Ga 1-x N layer and the undoped GaN layer during non-operation,
p×b×10 −7 +P s ≥1×10 13 [cm −2 ] being satisfied where b denotes the thickness of the p-type GaN layer, p denotes the hole concentration of the p-type GaN layer and P s denotes the concentration of the two-dimensional hole gas.
2. The hetero-junction bipolar transistor according to claim 1 wherein when the concentration of Mg doped with the p-type GaN layer is denoted as N Mg [cm −3 ] and the electrical activation ratio of Mg doped with the p-type GaN layer is denoted as r, N Mg ×r×b×10 −7 +P s ≥1×10 13 [cm −2 ] is satisfied.
3. The hetero-junction bipolar transistor according to claim 2 wherein the Al composition x and the thickness t [nm] of the Al x Ga 1-x N layer satisfy the following equation
t≥αx β
where α and β are numerals determined depending on necessary P s .
4. The hetero-junction bipolar transistor according to claim 3 wherein when P s ≥5×10 12 [cm −2 ], the Al composition x and the thickness t [nm] of the Al x Ga 1-x N layer satisfy the following equation:
t≥11290x −1.865 .
5. The hetero-junction bipolar transistor according to claim 2 wherein 5×10 19 [cm −3 ]≤N Mg ≤9×10 19 [cm −3 ] is satisfied.
6. The hetero-junction bipolar transistor according to claim 1 wherein the first n-type is formed on a first n + -type GaN layer, the second n-type GaN layer is formed on the p-type GaN layer like a mesa and a second n + -type GaN layer is formed on the second n-type GaN layer.
7. The hetero-junction bipolar transistor according to claim 6 wherein the emitter electrode is formed on a surface of the first n + -type GaN layer opposite to the first n-type GaN layer, the base electrode is formed on the part of the p-type GaN layer on which no second n-type GaN layer is formed and the collector electrode is formed on the second n + -type GaN layer.
8. The hetero-junction bipolar transistor according to claim 1 wherein an Al y Ga 1-y N graded layer is formed between the Al x Ga 1-x N layer and the undoped GaN layer, the Al composition y of the Al y Ga 1-y N graded layer decreasing monotonically from x to 0 in the direction from the Al x Ga 1-x N layer to the undoped GaN layer.
9. The hetero-junction bipolar transistor according to claim 6 , further comprising a p-type GaN layer formed between the second n-type GaN layer and the second n + -type GaN layer.