IP Library › Granted Patent US 10,090,067
Granted Patent B1
US 10,090,067 · App. 15/608,100 · Granted Oct 2, 2018

Data storage device with rewritable in-place memory

Inventors: Timothy Canepa (Los Gatos, CA); Mark Ish (Sandy Springs, GA); David S. Ebsen (Minnetonka, MN)
Assignee: Seagate Technology LLC
G11C29/789G06F12/0238G11C7/18G11C8/14G11C11/40607
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Quick Facts
Patent No.
US 10,090,067
App. No.
15/608,100
Granted
Oct 2, 2018
Kind
B1
Abstract

A data storage device can have at least a buffer memory, a selection module, and a non-volatile memory. The buffer memory and non-volatile memory may consist of different types of memory while the non-volatile memory has one or more rewritable in-place memory cells. The buffer memory and non-volatile memory may each store data associated with a pending data request as directed by the selection module until a settle time of the rewritable in-place memory cell has expired.

Claims (34)

1. An apparatus comprising a data storage device having a buffer memory, a selection module, and a non-volatile memory, the buffer memory and non-volatile memory comprising different types of memory, the non-volatile memory comprising a rewritable in-place memory cell, the buffer memory and non-volatile memory each storing data associated with a pending data request as directed by the selection module until a settle time of the rewritable in-place memory cell has expired, the selection module configured to restrict access to at least one memory cell of the non-volatile memory that is physically proximal to a memory cell where the write data is written.

2. The apparatus of claim 1 , wherein the data storage device has a plurality of bit addressable memory cells.

3. The apparatus of claim 2 , wherein each memory cell of the plurality of bit addressable memory cells are positioned between a bit line and a word line.

4. The apparatus of claim 3 , wherein each bit line is oriented orthogonally to each word line.

5. The apparatus of claim 2 , wherein a first group of the plurality of bit addressable memory cells are vertically stacked atop a second group of the plurality of bit addressable memory cells.

6. The apparatus of claim 2 , wherein each memory cell of the plurality of bit addressable memory cells comprises a selection layer contacting a resistive unit.

7. The apparatus of claim 2 , wherein no memory cell of the plurality of bit addressable memory cells is attached to a transistor.

8. The apparatus of claim 1 , wherein the buffer memory is volatile.

9. A method comprising

activating a data storage device having a buffer memory, a selection module, and a non-volatile memory, the buffer memory and non-volatile memory comprising different types of memory, the non-volatile memory comprising a rewritable in-place memory cell;

receiving a write request from a remote host, the write request having write data associated with the write request;

writing the write data concurrently to the buffer memory and non-volatile memory as directed by the selection module;

servicing a first read request for the write data by retrieving data from the buffer memory;

delaying reading the write data from the non-volatile memory while a timer of the selection module is active, the timer corresponding to a settle time of the non-volatile memory;

restricting access with the selection module to at least one memory cell of the non-volatile memory that is physically proximal to a memory cell where the write data is written; and

servicing a second read request for the write data by retrieving data from the non-volatile memory after the timer expires.

10. The method of claim 9 , wherein the non-volatile memory is unstable during the settle time.

11. The method of claim 9 , wherein the settle time is predicted by a prediction circuit of the selection module.

12. The method of claim 11 , wherein the predicted settle time is different than a default settle time.

13. The method of claim 11 , wherein the predicted settle time accommodates an elevated temperature of the data storage device.

14. A method comprising

activating a data storage device having a buffer memory, a selection module, and a non-volatile memory, the buffer memory and non-volatile memory comprising different types of memory, the non-volatile memory comprising a rewritable in-place memory cell;

receiving a write request from a remote host, the write request having write data associated with the write request;

writing the write data concurrently to the buffer memory and non-volatile memory as directed by the selection module;

servicing a first read request for the write data by retrieving data from the buffer memory;

delaying reading the write data from the non-volatile memory while a timer of the selection module is active;

restricting access with the selection module to at least one memory cell of the non-volatile memory that is physically proximal to a memory cell where the write data is written;

servicing a second read request for the write data by retrieving data from the non-volatile memory after the timer expires; and

deleting the write data from the buffer memory responsive to the expiration of the timer.

15. The method of claim 14 , wherein the selection module writes an update to the write data in the buffer memory without writing to the non-volatile memory while the timer is active.

16. The method of claim 14 , wherein the selection module assess whether data is currently being written by flagging the write data in the buffer memory.

17. The method of claim 14 , wherein the selection module maps the write data in a first level map and a second level map.

18. The method of claim 17 , wherein the first level map is resident in the buffer memory and the second level map is resident in the non-volatile memory.

19. The method of claim 17 , wherein the selection module generates a shadow map stored in the buffer memory.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2017
From: CANEPA, TIMOTHY; ISH, MARK; EBSEN, DAVID S.
To: SEAGATE TECHNOLOGY LLC
Reel/Frame 042530/0150 →
Cited By (1)
US 12,301,302