Semiconductor device and current limiting method

1. A semiconductor device, comprising:

a main transistor configured to carry out a supply of power from a power source to a load; and

a current limiting device, including a control transistor that is configured to control a gate voltage of the main transistor, and that has a current limiting function for limiting a current flowing through the main transistor, the control transistor having a source, a drain and a gate, wherein

the current limiting device is configured to detect that the current is an overcurrent, and

to activate the current limiting function, upon determining that

the current is equal to or greater than a current limit value, and

an operating voltage of the control transistor is equal to or greater than a current limiting activation voltage, wherein

the current limit value is a threshold for determining whether the current is greater than an operating current of the main transistor for the load to operate in a steady state, and is set lower than a maximum momentary value of an inrush current occurring when the load is started up, and

the current limiting activation voltage is a sum of a correction voltage and a predetermined threshold voltage at the gate of the control transistor when the current rises to the current limit value, and

not to activate the current limiting function upon detecting that the operating voltage of the control transistor is lower than the current limiting activation voltage, even when the inrush current is equal to or greater than the current limit value.

2. The semiconductor device according to claim 1 , wherein

the main transistor is an NMOS (N-type Metal-Oxide-Semiconductor) transistor that has a source, a drain and a gate, the drain of the main transistor being connected to the power source and the source of the main transistor being connected to the load,

the current limiting activation voltage is set higher than a first drain-to-source voltage generated in the main transistor when an inrush current occurs at start-up of the load, and

the current limiting activation voltage is set lower than a second drain-to-source voltage generated in the main transistor when the load short-circuits.

3. The semiconductor device according to claim 2 , wherein

the current limiting device includes the control transistor, a resistor, a diode having an anode and a cathode, and a sense transistor having a source, a drain and a gate, and

the sense transistor and control transistor are NMOS transistors, the gate of the sense transistor being connected to the gate of the main transistor, the drain of the control transistor and the drain of the sense transistor being connected to the power source, the source of the sense transistor being connected to the gate of the control transistor and one end of the resistor, the source of the control transistor being connected to the other end of the resistor and the anode of the diode, and the cathode of the diode being connected to the source of the main transistor and to one end of the load.

4. The semiconductor device according to claim 3 , wherein

the current limiting device is configured to add a forward voltage of the diode to the predetermined threshold voltage as the correction voltage, thereby forming the current limiting activation voltage.

5. The semiconductor device according to claim 3 , wherein

the diode includes a plurality of diodes connected in series, and

the current limiting device is configured to add a forward voltage of the plurality of diodes to the predetermined threshold voltage as the correction voltage, thereby forming the current limiting activation voltage.

6. The semiconductor device according to claim 1 , further comprising

a constant current control device configured to, upon detection of the overcurrent, clamp the gate voltage of the main transistor at a voltage set in advance, and cause a constant current lower than the overcurrent to be output from the main transistor based on the clamped voltage.

7. The semiconductor device according to claim 6 , wherein

the constant current control device is activated when the current flowing through the main transistor is equal to or greater than the current limit value, and an operating voltage of the constant current control device is equal to or greater than a steady current generation voltage set higher than the current limiting activation voltage.

8. A method for a current limiting device, including a control transistor having a source, a drain and a gate, to limit a current flowing through a main transistor that carries out a supply of power from a power source to a load, comprising:

setting a current limit value, which is a threshold for determining whether the current flowing through the main transistor is greater than an operating current of the main transistor for the load to operate in a steady state, and is set lower than a maximum momentary value of an inrush current occurring when the load is started up; and

detecting that the current is an overcurrent, and

activating a current limiting function of the current limiting device to limit the current, upon determining that

the current is equal to or greater than the current limit value, and

an operating voltage of the control transistor is equal to or greater than a current limiting activation voltage, wherein

the current limiting activation voltage is a sum of a correction voltage and a predetermined threshold voltage at the gate of the control transistor when the current rises to the current limit value, and

not activating the current limiting function upon detecting that the operating voltage of the control transistor is lower than the current limiting activation voltage, even when the inrush current is equal to or greater than the current limit value.

9. A semiconductor device, comprising:

a first transistor, connected to a power source and a load, for supplying power from the power source to the load; and

a current limiting device, including a second transistor having a source, a drain and a gate, connected to the main transistor, the current limiting device being configured

to detect a current flowing through the first transistor to the load,

to ascertain an operating voltage of the second transistor, and

to limit the current upon determining that

the detected current is no smaller than a current threshold, and

the ascertained operating voltage is no smaller than a current limiting activation voltage, wherein

the current threshold is a threshold below which the current flowing through the first transistor to the load operates the load in a steady state, and is set lower than a maximum momentary value of an inrush current occurring when the load is started up,

the current limiting activation voltage is a sum of a voltage at the gate of the second transistor when the current reaches the current threshold, and a correction voltage thereof, and

the current limiting device does not limit the current upon detecting that the operating voltage of the second transistor is lower than the current limiting activation voltage, even when the inrush current is equal to or greater than the current threshold.