Solid-state imaging device and electronic apparatus
The present technology relates to a solid-state imaging device and an electronic apparatus that perform a stable overflow from a photodiode and prevent Qs from decreasing and color mixing from occurring. A solid-state imaging device according to an aspect of the present technology includes, at a light receiving surface side of a semiconductor substrate, a charge retention part that generates and retains a charge in response to incident light, an OFD into which the charge saturated at the charge retention part is discharged, and a potential barrier that becomes a barrier of the charge that flows from the charge retention part to the OFD, the OFD including a low concentration OFD and a high concentration OFD having different impurity concentrations of the same type, and the high concentration OFD and the potential barrier being formed at a distance. For example, the present technology is applicable to a CMOS image sensor.
1. A solid-state imaging device, comprising:
at a light receiving surface side of a semiconductor substrate,
a charge retention part that generates and retains a charge in response to incident light;
an overflow drain (OFD) into which the charge saturated at the charge retention part is discharged; and
a potential barrier that becomes a barrier of the charge that flows from the charge retention part to the OFD,
the OFD including a low concentration OFD and a high concentration OFD and
the high concentration OFD and the potential barrier are separated by the low concentration OFD.
2. The solid-state imaging device according to claim 1 , wherein the charge retention part and the low concentration OFD have an equal impurity concentration of the same type.
3. The solid-state imaging device according to claim 2 , further comprising:
a first vertical transistor formed from a surface of the semiconductor substrate opposite to the light receiving surface and being in contact with the high concentration OFD.
4. The solid-state imaging device according to claim 3 , wherein the first vertical transistor and the potential barrier are formed at a distance.
5. The solid-state imaging device according to claim 3 , further comprising:
a drain layer extending in a horizontal direction from the first vertical transistor between a pixel transistor formed at the semiconductor substrate and the charge retention part.
6. The solid-state imaging device according to claim 5 , wherein the drain layer is formed of a diffusion layer including impurities of the same type as the charge retention part.
7. The solid-state imaging device according to claim 3 , further comprising:
a well isolation layer that electrically isolates a lower region of a predetermined pixel transistor from another region of well regions of the semiconductor substrate, and extends in a horizontal direction from the first vertical transistor.
8. The solid-state imaging device according to claim 7 , wherein a potential of the lower region of the predetermined pixel transistor that is electrically isolated by the well isolation layer is lower than a potential of the another region.
9. The solid-state imaging device according to claim 7 , wherein the predetermined pixel transistor is an AMP transistor and an SEL transistor.
10. The solid-state imaging device according to claim 9 , wherein an RST potential being an input voltage of the AMP transistor as the predetermined pixel transistor is lower than a drain voltage of the AMP transistor.
11. The solid-state imaging device according to claim 7 , wherein the predetermined pixel transistor is an RST transistor.
12. The solid-state imaging device according to claim 2 , further comprising:
a second vertical transistor formed from a surface of the semiconductor substrate opposite to the light receiving surface that reads the charge from the charge retention part.
13. The solid-state imaging device according to claim 2 , wherein a voltage is applied to the high concentration OFD, the voltage being higher than a voltage generated on the charge retention part when a charge is accumulated in the charge retention part.
14. The solid-state imaging device according to claim 13 , wherein a voltage is applied to the high concentration OFD, the voltage being higher than a voltage generated on the charge retention part when a charge is accumulated in the charge retention part, and being supplied via a through electrode that penetrates through the semiconductor substrate from a surface opposite to the light receiving surface of the semiconductor substrate.
15. The solid-state imaging device according to claim 14 , wherein the through electrode is formed for a plurality of pixels and is shared by the plurality of pixels.
16. The solid-state imaging device according to claim 2 , further comprising:
a control unit that controls a potential of the potential barrier.
17. The solid-state imaging device according to claim 2 , wherein the high concentration OFD is shared by a plurality of pixels.
18. The solid-state imaging device according to claim 2 , wherein a plurality of layers of the charge retention part are laminated in the semiconductor substrate.
19. The solid-state imaging device according to claim 2 , further comprising:
a photoelectric conversion film formed outside the light receiving surface of the semiconductor substrate.
20. An electronic apparatus on which a solid-state imaging device is mounted, the solid-state imaging device comprising:
at a light receiving surface side of a semiconductor substrate,
a charge retention part that generates and retains a charge in response to incident light;
an overflow drain (OFD) into which the charge saturated at the charge retention part is discharged; and
a potential barrier that becomes a barrier of the charge that flows from the charge retention part to the OFD,
the OFD including a low concentration OFD and a high concentration OFD having different impurity concentrations of the same type, and
the high concentration OFD and the potential barrier are separated by the low concentration OFD.