Semiconductor device
An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes a pixel including a first active region where a photodiode and a transfer transistor are formed and a second active region for supplying a grounding potential. Over a p-type semiconductor region in the second active region, a plug for supplying the grounding potential is disposed. In an n-type semiconductor region for a drain region of the transfer transistor formed in the first active region, a gettering element is introduced. However, in the p-type semiconductor region in the second active region, the gettering element is not introduced.
1. A semiconductor device, comprising:
a pixel which includes:
first and second active regions each formed in a first main surface of a semiconductor substrate and surrounded by an isolation region in plan view;
a photodiode formed in the first active region; and
a transfer transistor formed in the first active region to transfer charges generated by the photodiode,
wherein, in the semiconductor substrate, a p-type semiconductor region is formed so as to include the first and second active regions in plan view,
wherein, over the p-type semiconductor region in the second active region, a contact portion for supplying a grounding potential is formed and electrically coupled to the p-type semiconductor region,
wherein the photodiode has a first n-type semiconductor region which is formed in the p-type semiconductor region in the first active region,
wherein the transfer transistor has a second n-type semiconductor region which is formed in the p-type semiconductor region in the first active region to function as a drain region of the transfer transistor,
wherein the first n-type semiconductor region functions also as a source region of the transfer transistor, and
wherein, in the second n-type semiconductor region, a gettering element is introduced while, in the p-type semiconductor region in the second active region, the gettering element is not introduced.
2. The semiconductor device according to claim 1 ,
wherein, over the p-type semiconductor region in the second active region, a first metal silicide layer is formed,
wherein, over the first metal silicide layer, the contact portion is formed, and
wherein the contact portion is electrically coupled to the p-type semiconductor region via the first metal silicide layer.
3. The semiconductor device according to claim 1 ,
wherein the gettering element is carbon.
4. The semiconductor device according to claim 1 ,
wherein, in plan view, between the first and second n-type semiconductor regions, the isolation region is not interposed.
5. The semiconductor device according to claim 1 ,
wherein the pixel further includes:
a third active region formed in the first main surface of the semiconductor substrate and surrounded by the isolation region in plan view; and
a pixel transistor formed in the third active region,
wherein the p-type semiconductor region is formed in the semiconductor substrate so as to include the first, second, and third active regions in plan view,
wherein the pixel transistor has a third n-type semiconductor region formed in the p-type semiconductor region in the third active region to function as a source or drain region of the pixel transistor, and
wherein, in the third n-type semiconductor region, the gettering element is not introduced.
6. The semiconductor device according to claim 5 ,
wherein, over the third n-type semiconductor region, a second metal silicide layer is formed.
7. The semiconductor device according to claim 1 ,
wherein the pixel further includes:
a third active region formed in the first main surface of the semiconductor substrate and surrounded by the isolation region in plan view; and
a pixel transistor formed in the third active region,
wherein the p-type semiconductor region is formed in the semiconductor substrate so as to include the first, second, and third active regions in plan view,
wherein the pixel transistor has a third n-type semiconductor region formed in the p-type semiconductor region in the third active region so as to function as a source or drain region of the pixel transistor, and
wherein, in the third n-type semiconductor region also, the gettering element is introduced.
8. The semiconductor device according to claim 7 ,
wherein, over the third n-type semiconductor region, a second metal silicide layer is formed.
9. The semiconductor device according to claim 1 ,
wherein, in the first n-type semiconductor region, the gettering element is not introduced.
10. The semiconductor device according to claim 1 ,
wherein, over the first main surface of the semiconductor substrate, a plurality of the pixels are arranged in the form of an array.
11. The semiconductor device according to claim 1 ,
wherein, over the first main surface of the semiconductor substrate, an interlayer insulating film is formed, and
wherein the contact portion is a conductive plug embedded in the interlayer insulating film.
12. A semiconductor device, comprising:
a pixel which includes:
first, second, and third active regions each formed in a first main surface of a semiconductor substrate and surrounded by an isolation region in plan view;
a photodiode formed in the first active region;
a transfer transistor formed in the first active region to transfer charges generated by the photodiode; and
a pixel transistor formed in the third active region,
wherein, in the semiconductor substrate, a p-type semiconductor region is formed so as to include the first, second, and third active regions in plan view,
wherein, over the p-type semiconductor region in the second active region, a contact portion for supplying a grounding potential is formed and electrically coupled to the p-type semiconductor region,
wherein the photodiode has a first n-type semiconductor region formed in the p-type semiconductor region in the first active region,
wherein the transfer transistor has a second n-type semiconductor region formed in the p-type semiconductor region in the first active region to function as a drain region of the transfer transistor,
wherein the pixel transistor has a third n-type semiconductor region formed in the p-type semiconductor region in the third active region to function as a source or drain region of the pixel transistor,
wherein the first n-type semiconductor region functions also as a source region of the transfer transistor, and
wherein, in the third n-type semiconductor region, a gettering element is introduced while, in the p-type semiconductor region in the second active region, the gettering element is not introduced.
13. The semiconductor device according to claim 12 ,
wherein, over the p-type semiconductor region in the second active region, a first metal silicide layer is formed,
wherein, over the first metal silicide layer, the contact portion is formed, and
wherein the contact portion is electrically coupled to the p-type semiconductor region via the first metal silicide layer.
14. The semiconductor device according to claim 12 ,
wherein the gettering element is carbon.
15. The semiconductor device according to claim 12 ,
wherein, in the second n-type semiconductor region also, the gettering element is introduced.
16. The semiconductor device according to claim 12 ,
wherein, in the second n-type semiconductor region, the gettering element is not introduced.
17. The semiconductor device according to claim 12 ,
wherein, over the third n-type semiconductor region, a second metal silicide layer is formed.
18. The semiconductor device according to claim 12 ,
wherein, in the first n-type semiconductor region, the gettering element is not introduced.
19. The semiconductor device according to claim 1 , wherein the gettering element is introduced in the form of carbon ions or carbon cluster ions by ion implantation.
20. A semiconductor device, comprising:
a pixel which includes:
first and second active regions each formed in a first main surface of a semiconductor substrate and surrounded by an isolation region in plan view;
a photodiode formed in the first active region; and
a transfer transistor formed in the first active region to transfer charges generated by the photodiode,
wherein, in the semiconductor substrate, a p-type semiconductor region is formed so as to include the first and second active regions in plan view,
wherein, over the p-type semiconductor region in the second active region, a contact portion for supplying a grounding potential is formed and electrically coupled to the p-type semiconductor region,
wherein the photodiode has a first n-type semiconductor region which is formed in the p-type semiconductor region in the first active region,
wherein the transfer transistor has a second n-type semiconductor region which is formed in the p-type semiconductor region in the first active region to function as a drain region of the transfer transistor,
wherein the transfer transistor has a third n-type semiconductor region which is formed in the p-type semiconductor region in the first active region to function as an extension region of the transfer transistor,
wherein the first n-type semiconductor region functions also as a source region of the transfer transistor,
wherein the second n-type semiconductor region is located adjacent to the third n-type semiconductor region, and
wherein, in the second n-type semiconductor region, a gettering element is introduced while, in the p-type semiconductor region in the second active region, the gettering element is not introduced.