IP Library Granted Patent US 10,141,342
Granted Patent B2
US 10,141,342 · App. 14/862,171 · Granted Nov 27, 2018

Semiconductor device and display device

Inventor: Kei Takahashi (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225G09G3/3233G09G2320/0295G09G2320/043
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Quick Facts
Patent No.
US 10,141,342
App. No.
14/862,171
Granted
Nov 27, 2018
Kind
B2
Abstract

A semiconductor device capable of detecting a minute current with high accuracy is provided. The semiconductor device includes a first circuit, a second circuit, a first transistor, and a second transistor. A first analog signal is input to the first circuit via the first transistor. A second analog signal is input to the first circuit via the second transistor. The first analog signal includes a value of a first current. The second analog signal includes a value of a second current. The first circuit is capable of converting the first analog signal into a first digital signal. The second circuit is capable of generating a second digital signal based on the first digital signal. The first circuit is capable of converting the second analog signal into a third digital signal based on the second digital signal. The first or second transistor includes an oxide semiconductor in a channel.

Claims (61)

1. A semiconductor device comprising:

a first circuit comprising an integrator circuit comprising an operational amplifier;

a second circuit;

a first transistor; and

a second transistor,

wherein one of a source and a drain of the first transistor is directly connected to an inverting input terminal of the operational amplifier,

wherein one of a source and a drain of the second transistor is directly connected to the inverting input terminal of the operational amplifier,

wherein a first analog signal is input to an input terminal of the integrator circuit via the first transistor,

wherein a second analog signal is input to the input terminal of the integrator circuit via the second transistor,

wherein the integrator circuit is configured to change capacitance between the inverting input terminal of the operational amplifier and an output terminal of the operational amplifier,

wherein the first circuit is configured to convert the first analog signal into a first digital signal,

wherein the second circuit is configured to generate a second digital signal based on the first digital signal,

wherein the first circuit is configured to convert the second analog signal into a third digital signal based on the second digital signal, and

wherein at least one of the first transistor and the second transistor comprises an oxide semiconductor in a channel formation region.

2. The semiconductor device according to claim 1 , wherein the first circuit further comprises a comparator and a counter.

3. The semiconductor device according to claim 1 , wherein the second circuit comprises a successive approximation register.

4. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor contains indium, zinc and M, and

wherein M is Al, Ga, Ge, Y, Zr, Sn, La, Ce or Hf.

5. A semiconductor device comprising:

a first integrator circuit comprising an operational amplifier;

a comparator;

a counter;

a first transistor; and

a second transistor,

wherein one of a source and a drain of the first transistor is directly connected to an inverting input terminal of the operational amplifier,

wherein one of a source and a drain of the second transistor is directly connected to the inverting input terminal of the operational amplifier,

wherein the first transistor and the second transistor are configured not to be in an on-state at the same time,

wherein an output terminal of the operational amplifier is electrically connected to an inverting input terminal of the comparator,

wherein an output terminal of the comparator is electrically connected to the counter,

wherein the first integrator circuit is configured to change capacitance between the inverting input terminal of the operational amplifier and the output terminal of the operational amplifier, and

wherein at least one of the first transistor and the second transistor comprises an oxide semiconductor in a channel formation region.

6. The semiconductor device according to claim 5 ,

wherein a first analog signal is input to the inverting input terminal of the operational amplifier via the first transistor,

wherein a second analog signal is input to the inverting input terminal of the operational amplifier via the second transistor,

wherein a first potential is input to a non-inverting input terminal of the operational amplifier, and

wherein a second potential is input to a non-inverting input terminal of the comparator.

7. The semiconductor device according to claim 6 , further comprising a second integrator circuit, a third transistor and a fourth transistor,

wherein the first analog signal is input to the second integrator circuit via the third transistor, and

wherein a third analog signal is input to the second integrator circuit via the fourth transistor.

8. The semiconductor device according to claim 6 , wherein the capacitance is changed by using the first analog signal.

9. The semiconductor device according to claim 8 , wherein the first integrator circuit is configured to integrate the second analog signal by using the capacitance changed by using the first analog signal.

10. The semiconductor device according to claim 9 , further comprising a third transistor,

wherein a third analog signal is input to the inverting input terminal of the operational amplifier via the third transistor, and

wherein the first integrator circuit is configured to integrate the third analog signal by using the capacitance changed by using the first analog signal.

11. A display device comprising:

a first integrator circuit comprising an operational amplifier;

a first transistor;

a second transistor;

a pixel comprising a light-emitting element and a third transistor; and

a wiring,

wherein the light-emitting element is electrically connected to the wiring via the third transistor,

wherein one of a source and a drain of the first transistor is directly connected to an inverting input terminal of the operational amplifier,

wherein one of a source and a drain of the second transistor is directly connected to the inverting input terminal of the operational amplifier,

wherein the first transistor and the second transistor are configured not to be in an on-state at the same time,

wherein a first analog signal is input to an inverting input terminal of the operational amplifier via the first transistor,

wherein a second analog signal supplied from the wiring is input to the inverting input terminal of the operational amplifier via the second transistor,

wherein the first integrator circuit is configured to change capacitance between the inverting input terminal of the operational amplifier and an output terminal of the operational amplifier, and

wherein at least one of the first transistor and the second transistor comprises an oxide semiconductor in a channel formation region.

12. The display device according to claim 11 , wherein the capacitance is changed by using the first analog signal.

13. The display device according to claim 12 , wherein the first integrator circuit is configured to integrate the second analog signal by using the capacitance changed by using the first analog signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2015
From: TAKAHASHI, KEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 036628/0839 →
Priority Claims (1)
JP 2014-196896 · Sep 26, 2014 · national
Continuity (1)
Related Publication 20160093641A1 · Mar 31, 2016
Cited By (1)
US 12,592,714