ESD protection device and method

1. An electrostatic discharge (ESD) protection device, comprising:

a substrate structure comprising:

a semiconductor substrate;

a first fin and a second fin on the semiconductor substrate;

a first doped region and a second doped region having different conductivity types, the first doped region comprising a first portion of the semiconductor substrate and a first region of the first fin, the second doped region comprising a second portion of the semiconductor substrate, a second region of the first fin adjacent to the first region of the first fin, and the second fin;

a first gate structure on a surface portion of the first region of the first fin and a surface portion of the second region of the first fin, the first gate structure comprising:

an interface layer on the surface portion of the first region of the first fin and the surface portion of the second region of the first fin;

a spacer on the first fin and adjacent the interface layer;

a high-k dielectric layer on the interface layer and on opposite inner sidewalls of the spacer;

a first work-function adjusting layer only on a first portion of the high-k dielectric layer that is on the surface portion of the first region of the first fin;

a second work-function adjusting layer on the first work-function adjusting layer and on a second portion of the high-k dielectric layer that is on the surface portion of the second region of the first fin, wherein the second portion of the high-k dielectric layer does not have the first work-function adjusting layer disposed thereon; and

a gate on the second work-function adjusting layer; and

a first highly doped region in the first region and having a same conductivity type as a conductivity type of the first doped region and a doping concentration higher than a doping concentration of the first doped region; and

a second highly doped region in the second fin and having a same conductivity type as a conductivity type of the second doped region and a doping concentration higher than a doping concentration of the second doped region.

2. The ESD protection device of claim 1 , wherein:

the first work-function adjusting layer comprises one of Ti x N y , TaN, and TaC; and

the second work-function adjusting layer comprises one of TiAl, TiCAl, TiNAl, and TiSiAl.

3. The ESD protection device of claim 1 , wherein the first gate structure is disposed on a portion of a surface of the first region of the first fin and a portion of a surface of the second region of the first fin.

4. The ESD protection device of claim 1 , further comprising a shallow trench isolation (STI) region disposed in the second doped region and between the first and second fins.

5. The ESD protection device of claim 1 , wherein the first and second highly doped regions each include SiGe, SiC, or Si.

6. A semiconductor device comprising one or more of ESD protection devices of claim 1 .

7. The ESD protection device of claim 1 , wherein:

the first highly doped region is electrically connected to the gate of the first gate structure; and

the second highly doped region is electrically connected to an input terminal for receiving an external signal.

8. The ESD protection device of claim 7 , wherein:

the first doped region is P-type, the second doped region is N-type; and

the first highly doped region and the gate of the first gate structure are electrically connected to ground.