Modular array of vertically integrated superconducting qubit devices for scalable quantum computing
A technique relates to an assembly for a quantum computing device. A quantum bus plane includes a first set of recesses. A readout plane includes a second set of recesses. A block is positioned to hold the readout plane opposite the quantum bus plane, such that the first set of recesses opposes the second set of recesses. A plurality of qubit chips are included where each has a first end positioned in the first set of recesses and has a second end positioned in the second set of recesses.
1. A quantum device comprising:
a first substrate including a first set of locations;
a second substrate including a second set of locations; and
qubit chips having a first end positioned at the first set of locations and having a second end positioned at the second set of locations, wherein at least one of the qubit chips is configured to be removable.
2. The quantum device of claim 1 , further comprising a support positioned to hold the first substrate opposite the second substrate, such that the first set of locations opposes the second set of locations.
3. The quantum device of claim 2 , wherein the support is made of a superconducting material.
4. The quantum device of claim 2 , wherein the support is configured to receive a first assembly comb and a second assembly comb to form an intersection, the intersection of the first and second assembly combs forming slots for individually accepting the qubit chips.
5. The quantum device of claim 4 , wherein the slots mechanically hold the qubit chips in a vertical position.
6. The quantum device of claim 1 , wherein the qubit chips extend vertically in a lengthwise direction by being positioned at both the first set of locations and the second set of locations.
7. The quantum device of claim 1 , wherein the first set of locations supports the first end of the qubit chips in the first substrate; and
wherein the second set of locations supports the second end of the qubit chips in the second substrate.
8. The quantum device of claim 1 , wherein the first end of the qubit chips is opposite the second end.
9. The quantum device of claim 1 , wherein the first substrate comprises interconnect wiring.
10. The quantum device of claim 9 , wherein the interconnect wiring connects the qubit chips via coupling bus resonators.
11. The quantum device of claim 1 , wherein the second substrate comprises a fan-out wiring, the fan-out wiring individually connecting each of the qubit chips to a circuit board.
12. The quantum device of claim 11 , wherein the circuit board individually connects each of the qubit chips to connectors in a one-to-one relationship.
13. A quantum device comprising:
a housing configured as an enclosure having a support;
a first substrate including a first set of locations;
a second substrate including a second set of locations, wherein the support is configured to position the first substrate opposite the second substrate, such that the first set of locations opposes the second set of locations; and
qubit chips having a first end positioned at the first set of locations and having a second end positioned at the second set of locations, wherein at least one of the qubit chips is configured to be removable.
14. The quantum device of claim 13 , wherein the housing includes a housing slot through which the second substrate extends.
15. The quantum device of claim 14 , wherein the second substrate extends through the housing slot to connect to a circuit board, the circuit board connecting to connectors.
16. The quantum device of claim 13 , further comprising a mechanism configured to apply pressure to the second substrate, such that the pressure applied to the second substrate forces the qubit chips to the first substrate.
17. The quantum device of claim 16 , wherein the mechanism comprises:
a pusher block positioned on top of the second substrate, and
a spring mechanism pressing downward against the pusher block.