Silicon carbide semiconductor device
A silicon carbide semiconductor device includes a gate insulating film and a gate electrode. A first main surface is provided with a trench defined by a side surface penetrating a third impurity region and a second impurity region to reach a first impurity region, and a bottom provided continuously with the side surface. In a stress test in which a gate voltage of at least one of −10 V and 20 V is applied to the gate electrode for 100 hours at a temperature of 175° C., where a threshold voltage before the stress test is defined as a first threshold voltage and a threshold voltage after the stress test is defined as a second threshold voltage, an absolute value of a difference between the first threshold voltage and the second threshold voltage is not more than 0.25 V. The second threshold voltage is not less than 2.5 V.
1. A silicon carbide semiconductor device, comprising a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface,
the silicon carbide substrate including
a first impurity region having a first conductivity type,
a second impurity region provided on the first impurity region and having a second conductivity type different from the first conductivity type, and
a third impurity region provided on the second impurity region so as to be spaced from the first impurity region and having the first conductivity type,
the first main surface being provided with a trench, the trench defined by a side surface penetrating the third impurity region and the second impurity region to reach the first impurity region, and a bottom provided continuously with the side surface,
the first main surface being a {0001} plane, or a plane inclined at an angle of not more than 8° in an off direction relative to the {0001} plane,
an angle formed between the first main surface and the side surface being not less than 95° and not more than 130°,
the silicon carbide semiconductor device further comprising:
a gate insulating film in contact with the second impurity region at the side surface; and
a gate electrode provided on the gate insulating film,
in a stress test in which a gate voltage of at least one of −10 V and 20 V is applied to the gate electrode for 100 hours at a temperature of 175° C., where a threshold voltage before the stress test is defined as a first threshold voltage and a threshold voltage after the stress test is defined as a second threshold voltage, an absolute value of a difference between the first threshold voltage and the second threshold voltage being not more than 0.25 V, and the second threshold voltage being not less than 2.5 V,
the silicon carbide semiconductor device further comprising a gate pad connected to the gate electrode and facing the first main surface, wherein
the gate insulating film includes an insulating film portion provided between the first main surface and the gate pad,
the gate electrode includes an electrode portion provided on the insulating film portion, and
where an interface between the insulating film portion and the electrode portion is defined as a first interface, and a region of an interface between the insulating film portion and the silicon carbide substrate that faces the first interface is defined as a second interface, a value obtained by dividing a total number of sodium contained in an interface region, which lies between a first virtual surface distant from the first interface toward the electrode portion by a thickness of the insulating film portion along a normal direction of the first interface and a second virtual surface distant from the second interface toward the silicon carbide substrate by the thickness of the insulating film portion along a normal direction of the second interface, by an area of the first interface being not more than 5×10 10 atoms/cm 2 .
2. A silicon carbide semiconductor device, comprising a silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface,
the silicon carbide substrate including
a first impurity region having a first conductivity type,
a second impurity region provided on the first impurity region and having a second conductivity type different from the first conductivity type, and
a third impurity region provided on the second impurity region so as to be spaced from the first impurity region and having the first conductivity type,
the first main surface being provided with a trench, the trench defined by a side surface penetrating the third impurity region and the second impurity region to reach the first impurity region, and a bottom provided continuously with the side surface,
the first main surface being a {0001} plane, or a plane inclined at an angle of not more than 8° in an off direction relative to the {0001} plane,
an angle formed between the first main surface and the side surface being not less than 95° and not more than 130°,
the silicon carbide semiconductor device further comprising:
a gate insulating film in contact with the second impurity region at the side surface; and
a gate electrode provided on the gate insulating film,
in a stress test in which a gate voltage of at least one of −10 V and 20 V is applied to the gate electrode for 100 hours at a temperature of 175° C., where a threshold voltage before the stress test is defined as a first threshold voltage and a threshold voltage after the stress test is defined as a second threshold voltage, a value obtained by dividing an absolute value of a difference between the first threshold voltage and the second threshold voltage by the second threshold voltage being not more than 0.08, and the second threshold voltage being not less than 2.5 V,
the silicon carbide semiconductor device further comprising a gate pad connected to the gate electrode and facing the first main surface, wherein
the gate insulating film includes an insulating film portion provided between the first main surface and the gate pad,
the gate electrode includes an electrode portion provided on the insulating film portion, and
where an interface between the insulating film portion and the electrode portion is defined as a first interface, and a region of an interface between the insulating film portion and the silicon carbide substrate that faces the first interface is defined as a second interface, a value obtained by dividing a total number of sodium contained in an interface region, which lies between a first virtual surface distant from the first interface toward the electrode portion by a thickness of the insulating film portion along a normal direction of the first interface and a second virtual surface distant from the second interface toward the silicon carbide substrate by the thickness of the insulating film portion along a normal direction of the second interface, by an area of the first interface being not more than 5×10 10 atoms/cm 2 .
3. The silicon carbide semiconductor device according to claim 1 , wherein
the off direction is either a direction within 5° in the {0001} plane relative to a <1-100> direction, or a direction within 5° in the {0001} plane relative to a <11-20> direction.
4. The silicon carbide semiconductor device according to claim 1 , wherein
the side surface includes a {03-38} plane.