IP Library › Granted Patent US 10,199,939
Granted Patent B1
US 10,199,939 · App. 16/036,546 · Granted Feb 5, 2019

Multi-phase DC-DC converters with open-loop PWM for transient performance enhancement

Inventors: Kevin Yi Cheng Chang (Chandler, AZ); James Doyle (Chandler, AZ); Qing Li (Chandler, AZ); Xiaoying Yu (Chandler, AZ); Ibiyemi Omole (Chandler, AZ); Jonathon Stiff (Chandler, AZ); Erik Mentze (Chandler, AZ); Aysel Yildiz (Chandler, AZ)
Assignee: DIALOG SEMICONDUCTOR (UK) LIMITED
H02M3/1582H02M1/15H02M3/1584H02M3/33569H03K7/08
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Quick Facts
Patent No.
US 10,199,939
App. No.
16/036,546
Granted
Feb 5, 2019
Kind
B1
Abstract

A multi-phase switching power converter includes a panic mode detector that triggers the activation of each phase in an open-loop mode of operation in which an open-loop duty cycle is used that is greater than a closed-loop duty cycle used during closed-loop operation for the active phases.

Claims (35)

1. A multi-phase switching power converter, comprising;

a plurality of phases, each phase including a power stage and an inductor, wherein each power stage is configured to implement a duty cycle responsive to a duty cycle control signal;

a panic mode detector configured to perform an assertion of an open-loop enable signal to trigger an open-loop mode of operation for each phase in response to an output voltage being less than a voltage droop threshold;

a plurality of pulse-width modulators corresponding to the plurality of phases, each pulse-width modulator configured to generate a closed-loop PWM control signal for its corresponding phase;

an open-loop pulse width control signal generator configured to generate an open-loop control signal for each phase; and

a multiplexer configured to respond to the assertion of the open-loop enable signal by selecting for the open-loop control signal for each phase to form each phase's duty cycle control signal.

2. The multi-phase switching power converter of claim 1 , wherein the panic-mode detector is configured to perform a de-assertion of the open-loop enable signal responsive to the output voltage equaling a desired output voltage, wherein the multiplexer is further configured to respond to the de-assertion of the open-loop enable signal by selecting for the closed-loop PWM control signal for each phase to form the phase's duty cycle control signal.

3. The multi-phase switching power converter of claim 2 , wherein each pulse-width modulator is a dual-edge pulse-width modulator.

4. The multi-phase switching power converter of claim 2 , further comprising an error amplifier configured to compare the output voltage to a reference voltage to generate an error signal for each pulse-width modulator.

5. The multi-phase switching power converter of claim 4 , wherein the error amplifier includes a compensation network.

6. The multi-phase switching power converter of claim 2 , wherein the open-loop pulse width control signal generator is configured to generate the open-loop control signal for each phase to equal a power supply voltage.

7. The multi-phase switching power converter of claim 2 , wherein the open-loop pulse width control signal generator comprises a counter configured to control a pulse-width for each open-loop control signal.

8. The multi-phase switching power converter of claim 2 , wherein the open-loop pulse width control signal generator comprises a variable RC network configured to control a pulse-width for each open-loop control signal.

9. The multi-phase switching power converter of claim 2 , wherein each power stage is configured to implement a 100% duty cycle during the open-loop mode of operation.

10. The multi-phase switching power converter of claim 2 , wherein each power stage is configured to implement a 95% duty cycle during the open-loop mode of operation.

11. The multi-phase switching power converter of claim 1 , wherein the multi-phase switching power converter comprises a multi-phase buck converter.

12. The multi-phase switching power converter of claim 1 , wherein the panic mode detector is configured to activate each phase according to a phase-activation sequence.

13. The multi-phase switching power converter of claim 12 , wherein the phase-activation sequence comprises an initial activation of a clock buffer in each power stage, a subsequent activation of the open-loop pulse width control signal generator, a subsequent activation of non-overlap logic in each power stage, and a final activation of field-effect transistor power switches in each power stage.

14. A multi-phase switching power converter, comprising;

a plurality of phases, each phase including a power stage and an inductor, wherein each power stage is configured to implement a duty cycle responsive to a duty cycle control signal;

a panic mode detector configured to perform an assertion of an open-loop enable signal to trigger an open-loop mode of operation for each phase in response to a change in an output current for the multi-phase switching power converter exceeding a current change threshold;

a plurality of pulse-width modulators corresponding to the plurality of phases, each pulse-width modulator configured to generate a closed-loop PWM control signal for its corresponding phase;

an open-loop pulse width control signal generator configured to generate an open-loop control signal for each phase; and

a multiplexer configured to respond to the assertion of the open-loop enable signal by selecting for the open-loop control signal for each phase to form each phase's duty cycle control signal.

15. The multi-phase switching power converter of claim 14 , wherein the panic-mode detector is configured to perform a de-assertion of the open-loop enable signal responsive to the output current equaling a desired output current, wherein the multiplexer is further configured to respond to the de-assertion of the open-loop enable signal by selecting for the closed-loop PWM control signal for each phase to form the phase's duty cycle control signal.

16. The multi-phase switching power converter of claim 15 , wherein each pulse-width modulator is a dual-edge pulse-width modulator.

17. The multi-phase switching power converter of claim 16 , further comprising an error amplifier configured to compare an output voltage to a reference voltage to generate an error signal for each pulse-width modulator.

18. A method of open loop operation for a multi-phase buck converter, comprising:

detecting a panic condition selected from the group consisting of an output voltage falling below a voltage droop threshold and a change in an output current exceeding a current change threshold;

in response to the detection of the panic condition, activating each phase in the multi-phase buck converter to operate in an open-loop mode of operation.

19. The method of claim 18 , further comprising:

detecting that the panic condition no longer exists; and

in response to the detection of the absence of the panic condition, transitioning each phase to a closed-loop pulse-width mode of operation.

20. The method of claim 18 , wherein operating each phase in the open-loop mode of operation comprises controlling a power stage in each phase to implement a 100% duty cycle.

21. The method of claim 18 , wherein operating each phase in the open-loop mode of operation comprises controlling a power stage in each phase to implement a 95% duty cycle.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2018
From: CHANG, KEVIN YI CHENG; DOYLE, JAMES; LI, QING; YU, XIAOYING; OMOLE, IBIYEMI; STIFF, JONATHON; MENTZE, ERIK; YILDIZ, AYSEL
To: DIALOG SEMICONDUCTOR (UK) LIMITED
Reel/Frame 046362/0157 →
Cited By (1)
US 12,665,488