IP Library Granted Patent US 10,210,813
Granted Patent B2
US 10,210,813 · App. 15/457,689 · Granted Feb 19, 2019

Display device, electronic device, and driving method of display device

Inventors: Kei Kimura (Kanagawa, JP); Yusuke Onoyama (Kanagawa, JP)
Assignee: Sony Corporation
G09G3/3266G09G3/30G09G3/3208G09G3/3233G09G3/3258G09G3/3283G09G3/3291H01L27/124H01L27/32H01L27/3211H01L27/3216H01L27/3248H01L27/3265H01L27/3276H01L27/3288G09G2300/0426G09G2300/0819G09G2300/0852G09G2300/0861G09G2310/08G09G2320/0219G09G2320/0233G09G2320/0238G09G2320/045H01L27/1255
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Quick Facts
Patent No.
US 10,210,813
App. No.
15/457,689
Granted
Feb 19, 2019
Kind
B2
Abstract

Provided is a display device including a driving transistor, a switching unit, and a control unit. The driving transistor includes a control terminal, a first terminal, and a second terminal, and controls supply of current to a light emitting element, which is connected to the first terminal and emits light in accordance with the current amount, in accordance with a signal voltage applied to the control terminal. The switching unit can switch a conduction and non-conduction state, and, by being brought in the conduction state, forms a path that bypasses the light emitting element so that the current is not supplied to the light emitting element. The control unit performs control so that the switching unit is brought in the non-conduction state after the signal voltage is written into the control terminal, and controls a potential of the control terminal in synchronization with the control of the switching unit.

Claims (31)

1. A display device, comprising:

a first pixel circuit and a second pixel circuit adjacent to the first pixel circuit, the first and second pixel circuits respectively including a first transistor, a second transistor, a driving transistor, a first capacitor, a first wiring, and a second wiring, wherein

in both of the first and second pixel circuits:

a first signal line is connected to a first terminal of the first transistor,

a first electrode of the first capacitor is connected to the second terminal of the first transistor,

a second terminal of the driving transistor is connected to an anode electrode of an organic light emitting device,

the first wiring is connected to a metal layer overlapping with a channel region of the driving transistor via a first contact hole,

the second wiring is disposed over the first wiring,

an overlapping region of the second wiring and the first wiring constitutes a second capacitor,

the second wiring is connected to a third wiring via a second contact hole,

the first wiring and the third wiring are disposed on a same level in a cross-section perspective; and

a shape of the second wiring in the overlapping region of the first pixel circuit and a shape of the second wiring in the overlapping region of the second pixel circuits are different.

2. The display device according to claim 1 , wherein the first transistor is a sampling transistor.

3. The display device according to claim 1 , wherein the second transistor is a driving switching transistor.

4. The display device according to claim 1 , further comprising:

the first and second pixel circuits respectively include a third transistor.

5. The display device according to claim 4 , wherein the third transistor is a light emission control transistor.

6. The display device according to claim 4 , wherein, in both of the first and second pixel circuits, a fourth signal line is connected to a gate terminal of the third transistor.

7. The display device according to claim 6 , wherein the fourth signal line is common to the first and second pixel circuits.

8. The display device according to claim 1 , wherein the first capacitor is a storage capacitor.

9. The display device according to claim 1 , wherein the first capacitor is an auxiliary capacitor.

10. The display device according to claim 1 , wherein the first capacitor is connected between the first transistor and the driving transistor.

11. The display device according to claim 1 , wherein a gate of the second transistor is connected to scanning circuitry.

12. The display device according to claim 11 , wherein the scanning circuitry includes writing scanning circuitry, driving scanning circuitry, and signal output circuitry.

13. The display device according to claim 1 , wherein, in both of the first and second pixel circuits, a second signal line is connected to a gate terminal of the first transistor.

14. The display device according to claim 13 , wherein the second signal line is common to the first and second pixel circuits.

15. The display device according to claim 1 , wherein the first signal line of the first pixel circuit is parallel to the first signal line of the second pixel circuit.

16. The display device according to claim 1 , wherein the third wiring is a signal wiring and supplies a predetermined voltage.

17. The display device according to claim 1 , wherein, in both of the first and second pixel circuits, a third signal line is connected to a gate terminal of the second transistor.

18. The display device according to claim 17 , wherein the third signal line is common to the first and second pixel circuits.

19. The display device according to claim 1 , wherein the first and second pixel circuits are formed over a silicon substrate.

Priority Claims (1)
JP 2013-236795 · Nov 15, 2013 · national
Continuity (2)
Continuation 14508749 · Oct 7, 2014
Related Publication 20170243544A1 · Aug 24, 2017
Cited By (1)
US 12,488,749