DC offset calibration circuit
A DC offset calibration circuit for calibrating DC offset with multi-level method includes analog DC offset cancellation unit and digital DC offset cancellation unit, wherein analog DC offset cancellation unit includes first amplifier and integrator, first amplifier receives analog signal with DC offset, and transmits to integrator, and integrator transmits first feedback signal to first amplifier to output amplified signal with fixed DC offset, and digital DC offset cancellation unit includes comparator, digital circuit, digital-to-analog converter and second amplifier, where second amplifier receives amplified signal with fixed DC offset and transmits to comparator for determining DC offset value and transmitting to digital circuit, digital circuit generates logical result according to DC offset value and transmits to digital-to-analog converter, and therefore digital-to-analog converter accordingly generates second feedback signal to second amplifier, to calibrate DC offset value on second amplifier.
1. A DC offset calibration circuit, for calibrating DC offset with multi-level method, comprising:
an analog DC offset cancellation unit, comprising an analog integrator and a first amplifier, wherein the first amplifier is utilized for receiving an analog signal with a DC offset, and the analog integrator is utilized for receiving an output signal of the first amplifier and outputting a first feedback signal to the first amplifier, whereby the first amplifier outputs an amplified signal with fixed DC offset; and
a digital DC offset cancellation unit, coupled to the analog DC offset cancellation unit, for receiving the amplified signal with fixed DC offset from the analog DC offset cancellation unit, and comprising a comparator, a digital circuit, a digital-to-analog converter and a second amplifier, wherein the second amplifier is utilized for receiving the amplified signal with fixed DC offset, the comparator receives an output signal of the second amplifier for determining a DC offset value of the output signal and transmitting the DC offset value of the output signal to the digital circuit, the digital circuit is utilized for generating a logical result according to the DC offset and transmitting the logical result to the digital-to-analog converter, and the digital-to-analog converter is utilized for outputting a corresponding second feedback signal to the second amplifier according to the logical result, to calibrate the DC offset of the second amplifier.
2. The DC offset calibration circuit of claim 1 , wherein the first amplifier is a transconductance amplifier.
3. The DC offset calibration circuit of claim 1 , wherein the digital-to-analog converter is a static current generator.
4. The DC offset calibration circuit of claim 1 , wherein the analog signal is an intermediate frequency signal after mixing a high frequency signal.
5. A wireless signal transceiver, comprising:
a signal processing unit, comprising a mixer, for mixing a received high frequency signal with local oscillation frequency and transforming the high frequency signal to an intermediate frequency signal; and
a DC offset calibration circuit, for calibrating DC offset of the intermediate frequency signal with multi-level method, comprising:
an analog DC offset cancellation unit, comprising an analog integrator and a first amplifier, wherein the first amplifier is utilized for receiving an analog signal with a DC offset, and the analog integrator is utilized for receiving an output signal of the first amplifier and outputting a first feedback signal to the first amplifier, whereby the first amplifier outputs an amplified signal with fixed DC offset; and
a digital DC offset cancellation unit, coupled to the analog DC offset cancellation unit, for receiving the amplified signal with fixed DC offset from the analog DC offset cancellation unit, and comprising a comparator, a digital circuit, a digital-to-analog converter and a second amplifier, wherein the second amplifier is utilized for receiving the amplified signal with fixed DC offset, the comparator receives an output signal of the second amplifier, for determining a DC offset value of the output signal and outputting the DC offset value of the output signal to the digital circuit, the digital circuit is utilized for generating a logical result according to the DC offset and outputting the logical result to the digital-to-analog converter, and the digital-to-analog converter is utilized for outputting a corresponding second feedback signal to the second amplifier according to the logical result, for calibrating the DC offset of the second amplifier.
6. The wireless signal transceiver of claim 5 , wherein the first amplifier is a transconductance amplifier.
7. The wireless signal transceiver of claim 5 , wherein the digital-to-analog converter is a static current generator.