Middle-of-line (MOL) metal resistor temperature sensors for localized temperature sensing of active semiconductor areas in integrated circuits (ICs)

1. A middle-of-line (MOL) temperature sensor for an integrated circuit (IC), comprising:

an active semiconductor layer;

a metal resistor having a resistance and comprising a first metal material disposed in an MOL layer disposed above the active semiconductor layer, wherein the resistance of the metal resistor is a function of an ambient temperature of the metal resistor;

a first contact disposed above the metal resistor in the MOL layer, the first contact electrically coupled to a first contact area of the metal resistor;

a second contact disposed above the metal resistor in the MOL layer, the second contact electrically coupled to a second contact area of the metal resistor, wherein the metal resistor has a resistance between the first contact area and the second contact area;

a first interconnect disposed in a first interconnect layer above the MOL layer in the active semiconductor layer, the first interconnect layer electrically coupled to the first contact to electrically couple the first interconnect to the first contact area of the metal resistor; and

a second interconnect disposed in a second interconnect layer above the MOL layer in the active semiconductor layer, the second interconnect layer electrically coupled to the second contact to electrically couple the second interconnect to the second contact area of the metal resistor,

wherein the MOL layer has a thickness of approximately eighteen (18) nanometers (nm) or less.

2. The MOL temperature sensor of claim 1 , wherein a change in the resistance of the metal resistor is a function of a change in the ambient temperature of the metal resistor.

3. The MOL temperature sensor of claim 1 , wherein:

the active semiconductor layer comprises a first semiconductor device; and

the metal resistor is disposed in the MOL layer adjacent to the first semiconductor device to be exposed to an ambient temperature of the first semiconductor device.

4. The MOL temperature sensor of claim 3 , wherein:

the first semiconductor device comprises a transistor comprising a source, a drain, and a gate interdisposed between the source and the drain; and

the metal resistor is disposed in the MOL layer adjacent to the gate of the transistor to be exposed to an ambient temperature of the gate of the transistor.

5. The MOL temperature sensor of claim 4 , wherein:

the gate comprises:

a dielectric layer comprising a dielectric material;

a conductive layer comprising a conductive material;

a work function layer comprising a work function material disposed between the dielectric material and the conductive material; and

the first metal material comprises the work function material.

6. The MOL temperature sensor of claim 3 , wherein the metal resistor is located in the MOL layer within approximately seven (7) nanometers (nm) of the first semiconductor device.

7. The MOL temperature sensor of claim 1 , wherein the first interconnect is comprised of a first metal line, and the second interconnect is comprised of a second metal line.

8. The MOL temperature sensor of claim 1 , further comprising:

a first vertical interconnect access (via) disposed in the first interconnect layer, the first via in contact with the first contact area of the metal resistor and the first interconnect, to electrically couple the first contact area to the first interconnect; and

a second via disposed in the second interconnect layer, the second via in contact with the second contact area of the metal resistor and with the second interconnect, to electrically couple the second contact area to the second interconnect.

9. The MOL temperature sensor of claim 1 , wherein the first metal material comprises tungsten.

10. The MOL temperature sensor of claim 1 , wherein a size of the metal resistor is approximately W/L of 0.21 μm/0.21 μm.

11. The MOL temperature sensor of claim 1 , wherein the resistance of the metal resistor is at least 400 ohms per W/L ratio of 1.0 μm/1.0 μm.

12. The MOL temperature sensor of claim 1 integrated into a system-on-a-chip (SoC).

13. The MOL temperature sensor of claim 1 integrated into a device selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a mobile phone; a cellular phone; a smart phone; a tablet; a phablet; a computer; a portable computer; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; and an automobile.

14. A middle-of-line (MOL) metal resistor temperature sensor, comprising:

a means of forming an active semiconductor layer;

a means for forming a MOL layer above the means for providing the active semiconductor layer;

a means for forming a resistance disposed in the means for forming the MOL layer, the means for forming the resistance further comprising a means for providing the resistance between a first means for providing a first contact area and a second means for providing a second contact area, wherein the resistance is a function of an ambient temperature of the means for providing the resistance;

a first contacting means disposed above the means for providing the resistance for electrically coupling to the first means for providing the first contact area;

a second contacting means disposed above the means for providing the resistance for electrically coupling to the second means for providing the second contact area;

a first means for electrically coupling to the first contacting means, the first means for electrically coupling disposed in a first interconnect layer above the means for forming the MOL layer; and

a second means for electrically coupling to the second contacting means, the second means for electrically coupling disposed in a second interconnect layer above the means for forming the MOL layer,

wherein the MOL layer has a thickness of approximately eighteen (18) nanometers (nm) or less.