IP Library › Granted Patent US 10,263,170
Granted Patent B1
US 10,263,170 · App. 15/827,729 · Granted Apr 16, 2019

Bumped resonator structure

Inventors: Markus Brink (White Plains, NY); Antonio D. Corcoles-Gonzalez (Mount Kisco, NY); Jay M. Gambetta (Yorktown Heights, NY); Sami Rosenblatt (White Plains, NY); Firat Solgun (Ossining, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H01L39/025G06N99/002H01L27/18H01L39/223H01L39/2493
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Quick Facts
Patent No.
US 10,263,170
App. No.
15/827,729
Granted
Apr 16, 2019
Kind
B1
Abstract

A technique relates a structure. An inductive element is on a first surface. A capacitive element is on the first surface and a second surface. An interconnect structure is between the first surface and the second surface.

Claims (42)

1. A structure comprising:

an inductive element on a first surface of a substrate;

a capacitive element comprising a first capacitor pad and a second capacitor pad, the first capacitor pad being directly on the first surface of the substrate and the second capacitor pad being directly on a second surface; and

an interconnect structure between the first surface and the second surface, such that the first capacitor pad is directly opposite the second capacitor pad;

wherein the inductive element is distinct from the capacitive element.

2. The structure of claim 1 , wherein the capacitive element comprises the interconnect structure.

3. The structure of claim 1 , wherein the inductive element is selected from the group consisting of a spiral coil, a spiral-like coil, a meandering wire, a kinetic inductor, a Josephson junction, and a series array of Josephson junctions.

4. The structure of claim 1 , wherein the inductive element is shunted to ground.

5. The structure of claim 1 , wherein the capacitive element is selected from the group consisting of a plate capacitor and an interdigitated capacitor.

6. The structure of claim 1 , wherein the interconnect structure is a solder bump.

7. The structure of claim 1 , wherein the interconnect structure is a through-silicon via.

8. The structure of claim 1 , wherein at least one signal delivery line is coupled to the inductive element.

9. The structure of claim 1 , wherein at least one signal delivery line is coupled to the capacitive element.

10. The structure of claim 1 , wherein at least one superconducting qubit is coupled to the inductive element.

11. The structure of claim 1 , wherein at least one superconducting qubit is coupled to the capacitive element.

12. The structure of claim 1 , wherein the inductive element, the capacitive element, and the interconnect structure comprise a superconducting metal.

13. The structure of claim 1 , wherein at least a portion of the capacitive element and at least a portion of the interconnect structure are equipotential.

14. The structure of claim 1 , wherein the first surface opposes the second surface.

15. A method of forming a structure, the method comprising:

disposing an inductive element on a first surface of a substrate;

disposing a capacitive element comprising a first capacitor pad and a second capacitor pad, the first capacitor pad being directly on the first surface of the substrate and the second capacitor pad being directly on a second surface; and

coupling an interconnect structure between the first surface and the second surface, such that the first capacitor pad is directly opposite the second capacitor pad;

wherein the inductive element is distinct from the capacitive element.

16. The method of claim 15 , wherein the capacitive element comprises the interconnect structure.

17. The method of claim 15 , wherein the inductive element is selected from the group consisting of a spiral coil, a spiral-like coil, a meandering wire, a kinetic inductor, a Josephson junction, and a series array of Josephson junctions.

18. The method of claim 15 , wherein the inductive element is shunted to ground.

19. The method of claim 15 , wherein the capacitive element is selected from the group consisting of a plate capacitor and an interdigitated capacitor.

20. The method of claim 15 , wherein the interconnect structure is selected from the group consisting of a solder bump and a through-silicon via.

21. A structure comprising:

a capacitive element comprising a first portion directly on a first surface of a substrate and a second portion directly on a second surface, the first and second portions having an equipotential, wherein the first capacitor pad is directly opposite the second capacitor pad; and

an inductive element disposed on the first surface of the substrate and absent from the second surface;

wherein the inductive element is distinct from the capacitive element.

22. The structure of claim 21 , wherein an interconnect connects the first and second portions to have the equipotential.

23. A method of forming a structure, the method comprising:

providing a capacitive element comprising a first portion directly on a first surface of a substrate and a second portion directly on a second surface, the first and second portions having an equipotential, wherein the first capacitor pad is directly opposite the second capacitor pad; and

forming an inductive element on the first surface of the substrate and to be absent from the second surface.

24. The method of claim 23 , wherein an interconnect connects the first and second portions to have the equipotential.

25. A resonator comprising:

a capacitor comprising a first superconducting material directly on a first surface of a substrate and a second superconducting material directly on a second surface, such that the first and second superconducting materials are connected by a superconducting interconnect, the first and second superconducting materials on different surfaces; and

an inductor disposed on one of the different surfaces;

wherein the first superconducting material is directly opposite the second superconducting material; and

wherein the inductor is distinct from the capacitor.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE SECOND ASSIGNOR BY ADDING HIS MIDDLE INITIAL PREVIOUSLY RECORDED ON REEL 044267 FRAME 0069. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jan 8, 2018
From: BRINK, MARKUS; CORCOLES-GONZALEZ, ANTONIO D.; GAMBETTA, JAY M.; ROSENBLATT, SAMI; SOLGUN, FIRAT
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 045022/0303 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 30, 2017
From: BRINK, MARKUS; CORCOLES-GONZALEZ, ANTONIO; GAMBETTA, JAY M.; ROSENBLATT, SAMI; SOLGUN, FIRAT
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 044267/0069 →
Cited By (3)
US 12,432,843 US 12,575,335 US 12,718,975