Semiconductor device and method of forming the same
A semiconductor device and method of forming the same, the semiconductor device includes a substrate, first plug, a magnetoresistive random access memory (MRAM) structure, a spacer layer, a seal layer and a first conductive pattern. The substrate has a first region and a second region, and the first plug is disposed on a dielectric layer disposed on the substrate, within the first region. The MRAM structure is disposed in the dielectric layer and electrically connected to the first plug. The spacer layer is disposed both within the first region and the second region, to cover the MRAM structure. The seal layer is disposed on the MRAM structure and the first plug, only within the first region. The first conductive pattern penetrates through the seal layer to electrically connect the MRAM structure.
1. A semiconductor device, comprising:
a substrate having a first region and a second region;
a first dielectric layer disposed on the substrate;
a first plug disposed in the first dielectric layer, within the first region;
a magnetoresistive random access memory (MRAM) structure disposed in a second dielectric layer and electrically connected to the first plug;
a spacer layer disposed both within the first region and the second region, to cover the MRAM structure;
a seal layer disposed on the spacer layer and the MRAM structure, only within the first region; and
a first conductive pattern penetrated through the seal layer to electrically connect the MRAM structure.
2. The semiconductor device according to claim 1 , wherein a top surface of the spacer layer is lower than a top surface of the MRAM structure.
3. The semiconductor device according to claim 1 , wherein a top surface of the spacer layer is higher than a top surface of the MRAM structure.
4. The semiconductor device according to claim 3 , wherein the seal layer comprises a protruding portion and the protruding portion is disposed on the MRAM structure.
5. The semiconductor device according to claim 4 , wherein a top surface of the protruding portion is higher than the top surface of the spacer layer.
6. The semiconductor device according to claim 1 , further comprising:
a second conductive pattern disposed in the second dielectric layer, within the second region, the second conductive pattern being penetrated through the spacer layer.
7. The semiconductor device according to claim 6 , wherein the second conductive pattern comprises a dual damascene structure.
8. The semiconductor device according to claim 1 , wherein the MRAM structure comprises a bottom electrode, a tunneling barrier layer and a top electrode stacked one over another on the substrate.