SiC semiconductor device having pn junction interface and method for manufacturing the SiC semiconductor device
A method for manufacturing a semiconductor device capable of reducing an ON resistance. In the present invention, a drift layer is formed on a substrate. An ion implanted layer is formed in a surface of the drift layer. A surplus carbon region is formed in the drift layer. The drift layer is heated. In a case where the surplus carbon region is formed, the surplus carbon region is formed in a region deeper than an interface between the ion implanted layer and the drift layer. In a case where the drift layer is heated, impurity ions of the ion implanted layer are activated to form an activation layer, and interstitial carbon atoms are dispersed toward the activation layer.
1. A bipolar semiconductor device having a breakdown voltage greater than or equal to 10 kV, comprising:
a drift layer of a first conductivity type formed on a silicon carbide semiconductor substrate; and
an activation layer of a second conductivity type formed in a predetermined region on a surface side of said drift layer,
wherein a relationship among a carrier lifetime A in ns in a surface of said activation layer, a carrier lifetime B in ns in an interface between said activation layer and said drift layer, and a portion of said drift layer extending between said silicon carbide semiconductor substrate and said activation layer and having a thickness of T in μm satisfies B≥A×10 and a value of B≥ a value 0.3×T 2 .
2. The semiconductor device according to claim 1 , wherein said first conductivity type is an n-type conductivity and said second conductivity time is a p-type conductivity.