IP Library › Granted Patent US 10,305,193
Granted Patent B1
US 10,305,193 · App. 15/902,396 · Granted May 28, 2019

Wide-band high speed communications channel for cryogenic applications

Inventors: Amedeo Larussi (Waltham, MA); David A. Buell (Waltham, MA); Craig R. Adams (Waltham, MA); Christopher Moshenrose (Waltham, MA)
Assignee: Raytheon Company
H01Q13/206H01L23/66H01P1/047H01P5/028H01L2223/6627
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Quick Facts
Patent No.
US 10,305,193
App. No.
15/902,396
Granted
May 28, 2019
Kind
B1
Abstract

A high speed radio frequency signal interconnect device provides for signal communication within a system at cryogenic temperatures. The device includes a plurality of conductive traces provided on a first dielectric substrate where the ends of the traces have a predetermined shape. A second dielectric substrate covers the first dielectric substrate leaving the ends of the traces exposed. A connector is coupled to each respective end and includes pins coupled to a respective trace. Each connector is configured to define a respective isolating chamber about each of the first ends of the conductive traces where the pins are attached.

Claims (44)

1. An RF signal interconnect device, comprising:

a first dielectric substrate having a first surface and a second surface and first and second ends;

a plurality of conductive traces provided on the first surface of the first dielectric substrate, each trace having first and second ends, wherein each of the first and second ends has a predetermined shape;

a second dielectric substrate disposed on the first surface of the first dielectric substrate, the second dielectric substrate having first and second ends respectively aligned with the first and second ends of the first substrate, wherein the second dielectric substrate is configured so as not to cover the first and second ends of the conductive traces, whereby the first and second ends of the traces are exposed;

a first connector coupled to the first ends of the first and second dielectric substrates;

a first plurality of conductive pin assemblies disposed in the first connector, each conductive pin assembly coupled to a respective first end of a conductive trace where the conductive trace is not covered by the second dielectric substrate,

wherein the first connector is configured to define a respective isolating chamber about each of the first ends of the conductive traces.

2. The device of claim 1 , wherein:

an adhesive is provided between the first and second dielectric substrates.

3. The device of claim 1 , wherein each of the first and second dielectric substrates comprises polyimide.

4. The device of claim 1 , wherein the first connector comprises a plurality of dividing walls to define each isolating chamber.

5. The device of claim 1 , wherein each of the first and second ends of the conductive traces comprises a section exposing the first surface of the first dielectric substrate.

6. The device of claim 5 , wherein a portion of the second dielectric that exposes the first and second ends of the conductive traces comprises a generally V-shaped notch.

7. The device of claim 6 , wherein an apex of the V-shaped notch is rounded.

8. The device of claim 1 , further comprising:

a first protective layer provided on the second dielectric substrate; and

a second protective layer provided on the second surface of the first dielectric substrate,

wherein each of the first and second protection layers comprises one of: a niobium film or copper foil.

9. The device of claim 8 , wherein the first protective layer does not cover the second dielectric substrate where the first and second ends of the conductive traces are accessible.

10. The device of claim 1 , wherein each conductive trace comprises one of: Niobium, Niobium-Titanium Alloy, Niobium-Germanium Alloy, Niobium-Tin Alloy, Tantalum or Magnesium Diboride.

11. The device of claim 10 , wherein each conductive trace is provided on the first surface of the first dielectric substrate by sputtering.

12. An RF signal interconnect device, comprising:

a signal carrying structure, comprising:

a first dielectric substrate having a first surface and a second surface;

a plurality of conductive traces provided on the first surface of the first dielectric substrate, each trace having first and second ends, wherein each of the first and second ends has a predetermined shape; and

a second dielectric substrate disposed on the first surface of the first dielectric substrate,

wherein the second dielectric substrate is configured so as not to cover the first and second ends of the conductive traces, whereby the first and second ends of the traces are exposed; and

a first connector, coupled to the signal carrying structure, comprising:

an upper shell portion;

a plurality of dividing walls provided in the upper shell portion and defining a plurality of cavities; and

a first plurality of conductive pin assemblies, each pin assembly arranged in a respective upper shell portion cavity and coupled to a respective first end of a conductive trace where the conductive trace remains exposed through the second dielectric substrate,

whereby a respective isolating chamber about the first ends of the conductive traces is provided.

13. The device of claim 12 , wherein the signal carrying structure further comprises:

an adhesive provided between the first and second dielectric substrates.

14. The device of claim 12 , wherein each of the first and second dielectric substrates comprises polyimide.

15. The device of claim 12 , wherein the signal carrying structure further comprises:

a first protective layer provided on the second dielectric substrate; and

a second protective layer provided on the second surface of the first dielectric substrate,

wherein each of the first and second protection layers comprises one of: a niobium film or copper foil.

16. The device of claim 12 , wherein each of the first and second ends of the conductive traces comprises a section exposing the first surface of the first dielectric substrate.

17. The device of claim 16 , wherein a portion of the second dielectric that exposes the first and second ends of the conductive traces comprises a V-shaped notch.

18. The device of claim 17 , wherein an apex of the V-shaped notch is rounded.

19. The device of claim 12 , wherein each conductive trace comprises at least one of: Niobium, Niobium-Titanium Alloy, Niobium-Germanium Alloy, Niobium-Tin Alloy, Tantalum or Magnesium Diboride.

20. The device of claim 19 , wherein each conductive trace is provided on the first surface of the first dielectric substrate by sputtering.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2018
From: LARUSSI, AMEDEO; BUELL, DAVID A.; ADAMS, CRAIG R.; MOSHENROSE, CHRISTOPHER
To: RAYTHEON COMPANY
Reel/Frame 045015/0037 →
Cited By (1)
US 12,693,157