Enclosure-to-board interface with tamper-detect circuit(s)
Tamper-respondent assemblies and fabrication methods are provided which incorporate enclosure-to-circuit board protection. The tamper-respondent assemblies include a circuit board, and an enclosure mounted to the circuit board along an enclosure-to-board interface. The enclosure facilitates enclosing at least one electronic component coupled to the circuit board within a secure volume. A tamper-respondent electronic circuit structure facilitates defining the secure volume, and includes one or more tamper-detect circuits including at least one conductive trace disposed, at least in part, within the enclosure-to-board interface. The conductive trace(s) includes stress rise regions to facilitate tamper-detection at the enclosure-to-board interface. An adhesive is provided to secure the enclosure to the circuit board. The adhesive contacts, at least in part, the conductive trace(s) of the tamper-detect circuit(s) at the enclosure-to-board interface, including at the stress rise regions of the conductive trace(s).
1. A tamper-respondent assembly comprising:
a circuit board;
an enclosure mounted to the circuit board along an enclosure-to-board interface, the enclosure facilitating enclosing at least one electronic component coupled to the circuit board within a secure volume;
a tamper-respondent electronic circuit structure facilitating defining the secure volume, the tamper-respondent electronic circuit structure comprising one or more tamper-detect circuits defined, at least in part, by at least one conductive trace disposed, at least in part, within the enclosure-to-board interface, the at least one conductive trace comprising stress rise regions to facilitate detecting a tamper event at the enclosure-to-board interface;
an adhesive securing the enclosure to the circuit board, the adhesive contacting, at least in part, the at least one conductive trace of the one or more tamper-detect circuits within the enclosure-to-board interface, including at the stress rise regions of the at least one conductive trace;
a solder mask, the solder mask partially covering the at least one conductive trace, and defining unexposed regions of the at least one conductive trace within the enclosure-to-board interface; and
wherein the at least one conductive trace comprises the unexposed regions and exposed regions within the enclosure-to-board interface, the at least one conductive trace being exposed to the adhesive in the exposed regions and unexposed to the adhesive in the unexposed regions to facilitate defining the stress rise regions.
2. The tamper-respondent assembly of claim 1 , wherein the at least one conductive trace comprises a serpentine conductive trace with angle bends disposed, at least in part, within the enclosure-to-board interface, and the angle bends are selected from the group comprising right angle bends and acute angle bends.
3. The tamper-respondent assembly of claim 2 , further comprising multiple conductive vias intersecting the serpentine conductive trace and extending into the circuit board, the multiple conductive vias facilitating defining, at least in part, the stress rise regions of the at least one conductive trace.
4. The tamper-respondent assembly of claim 3 , wherein the multiple conductive vias extend through the circuit board.
5. The tamper-respondent assembly of claim 2 , wherein the serpentine conductive trace resides on a surface of the circuit board, and is disposed in part within an area of the enclosure-to-board interface and in part within the secure volume, at an inner periphery of the enclosure-to-board interface.
6. The tamper-respondent assembly of claim 5 , further comprising multiple conductive vias intersecting the serpentine conductive trace and extending into the circuit board, the multiple conductive vias facilitating defining, at least in part, the stress rise regions of the at least one conductive trace.
7. The tamper-respondent assembly of claim 5 , wherein the angle bends of the serpentine conductive trace are a first set of angle bends, and wherein the serpentine conductive trace further comprises a second set of angle bends disposed within the secure volume at the inner periphery of the enclosure-to-board interface.
8. The tamper-respondent assembly of claim 1 , wherein the at least one conductive trace comprises a conductive circuit residing, at least in part, on one side of the circuit board.
9. The tamper-respondent assembly of claim 8 , wherein the conductive circuit further comprises multiple conductive vias extending into the circuit board.
10. The tamper-respondent assembly of claim 9 , wherein the multiple conductive vias extend through the circuit board, and the conductive circuit resides, at least in part, on another side of the circuit board, the one side and the another side being opposite sides of the circuit board.
11. A tamper-respondent assembly comprising:
a circuit board;
at least one electronic component to be protected, the at least one electronic component being associated with the circuit board;
an enclosure mounted to the circuit board along an enclosure-to-board interface, the enclosure facilitating enclosing the at least one electronic component within a secure volume;
a tamper-respondent electronic circuit structure facilitating defining the secure volume, the tamper-respondent electronic circuit structure comprising one or more tamper-detect circuits comprising at least one conductive trace disposed, at least in part, within the enclosure-to-board interface, the at least one conductive trace comprising stress rise regions to facilitate detecting a tamper event at the enclosure-to-board interface;
an adhesive securing the enclosure to the circuit board, the adhesive contacting, at least in part, the at least one conductive trace of the one or more tamper-detect circuits within the enclosure-to-board interface, including at the stress rise regions of the at least one conductive trace;
a solder mask, the solder mask partially covering the at least one conductive trace, and defining unexposed regions of the at least one conductive trace within the enclosure-to-board interface; and
wherein the at least one conductive trace comprises the unexposed regions and exposed regions within the enclosure-to-board interface, the at least one conductive trace being exposed to the adhesive in the exposed regions and unexposed to the adhesive in the unexposed regions to facilitate defining the stress rise regions.
12. The tamper-respondent assembly of claim 11 , wherein the at least one conductive trace comprises a serpentine conductive trace with angle bends disposed, at least in part, within the enclosure-to-board interface, and the angle bends are selected from the group comprising right angle bends and acute angle bends.
13. The tamper-respondent assembly of claim 12 , further comprising multiple conductive vias intersecting the serpentine conductive trace and extending into the circuit board, the multiple conductive vias facilitating defining, at least in part, the stress rise regions of the at least one conductive trace.