Memristive neuromorphic circuit and method for training the memristive neuromorphic circuit
A neural network is implemented as a memristive neuromorphic circuit that includes a neuron circuit and a memristive device connected to the neuron circuit. An input voltage is sensed at a first terminal of a memristive device during a feedforward operation of the neural network. An error voltage is sensed at a second terminal of the memristive device during an error backpropagation operation of the neural network. In accordance with a training rule, a desired conductance change for the memristive device is computed based on the sensed input voltage and the sensed error voltage. Then a training voltage is applied to the memristive device. Here, the training voltage is proportional to a logarithmic value of the desired conductance change.
1. A method for training a memristive neuromorphic circuit, comprising:
sensing an input voltage at a first terminal of a memristive device during a feedforward operation of a neural network, the neural network including the memristive device and a neuron circuit connected to the memristive device;
sensing an error voltage at a second terminal of the memristive device during an error backpropagation operation of the neural network;
computing, in accordance with a training rule, a desired conductance change for the memristive device based on the sensed input voltage and the sensed error voltage; and
applying a training voltage to the memristive device, the training voltage being proportional to a logarithmic value of the desired conductance change.
2. The method of claim 1 , wherein
the desired conductance change is computed as the sensed input voltage and the sensed error voltage, and
the training voltage is applied as a first complimentary voltage at the first terminal of the memristive device and a second complimentary voltage at the second terminal of the memristive device.
3. The method of claim 2 , wherein
the first complimentary voltage is proportional to a logarithmic value of the sensed input voltage, and
the second complimentary voltage is proportional to a logarithmic value of the sensed error voltage.
4. The method of claim 2 , further comprising:
at least one of clipping and normalizing the first complimentary voltage and the second complimentary voltage such that
the first complimentary voltage is below a threshold voltage of the memristive device,
the second complimentary voltage is below the threshold voltage of the memristive device, and
a sum of the first complimentary voltage and the second complimentary voltage is above the threshold voltage of the memristive device.
5. The method of claim 1 , wherein
the input voltage sensing step and the error voltage sensing step are iterated for a plurality of input patterns, and
the desired conductance change is computed as:
Δ G BATCH =Σx*e
where ΔG BATCH is a batch conductance change, x and e are the sensed input voltage and sensed error voltage, respectively, of each of the plurality of input patterns, and Σ indicates summing over the plurality of input patterns.
6. The method of claim 5 , further comprising:
at least one of clipping and normalizing the training voltage to be above a threshold voltage of the memristive device and below twice the threshold voltage of the memristive device.
7. The method of claim 1 , wherein
the neuron circuit includes a plurality of input neurons and a plurality of output neurons, and
the memristive device is included in a plurality of differential pairs of memristive devices cross-connecting the plurality of input neurons with the plurality of output neurons as a crossbar circuit.
8. The method of claim 7 , further comprising:
at a first time step, training first memristive devices of the plurality of differential pairs of memristive devices, each of the first memristive devices having positive input voltage during the feedforward operation and positive error voltage during the error backpropagation operation;
at a second time step, training second memristive devices of the plurality of differential pairs of memristive devices, each of the second memristive devices having negative input voltage during the feedforward operation and negative error voltage during the error backpropagation operation;
at a third time step, training third memristive devices of the plurality of differential pairs of memristive devices, each of the third memristive devices having positive input voltage during the feedforward operation and negative error voltage during the error backpropagation operation; and
at a fourth time step, training fourth memristive devices of the plurality of differential pairs of memristive devices, each of the fourth memristive devices having negative input voltage during the feedforward operation and positive error voltage during the error backpropagation operation.
9. The method of claim 7 , wherein
the input voltage sensing step includes sensing a plurality of input voltages at the plurality of input neurons during the feedforward operation,
the error voltage sensing step includes sensing a plurality of error voltages at the plurality of output neurons during the error backpropagation operation.
10. The method of claim 9 , further comprising:
matrix multiplying the sensed plurality of input voltages with the sensed plurality of error voltages to compute a desired conductance change for each memristive device of the plurality of differential pairs of memristive devices.
11. The method of claim 10 , further comprising:
at a first time step, training first memristive devices of the plurality of differential pairs of memristive devices, each of the first memristive devices having a positive desired conductance change; and
at a second time step, training second memristive devices of the plurality of differential pairs of memristive devices, each of the second memristive devices having a negative desired conductance change, wherein
the first memristive devices and the second memristive devices share a same terminal.
12. The method of claim 11 , wherein
during the first time step, a negative fixed voltage is applied to the shared same terminal, and
during the second time step, a positive fixed voltage is applied to the shared same terminal.
13. A memristive neuromorphic circuit for implementing a neural network, comprising:
a memristive device;
a neuron circuit connected to the memristive device; and
a controller including a processor and a memory, wherein
the controller is programmed to
sense an input voltage at a first terminal of the memristive device during a feedforward operation,
sense an error voltage at a second terminal of the memristive device during an error backpropagation operation,
compute a desired conductance change for the memristive device based on the sensed input voltage and the sensed error voltage; and
apply a training voltage to the memristive device, the training voltage being proportional to a logarithmic value of the desired conductance change.
14. The memristive neuromorphic circuit of claim 13 , wherein
the memristive device is a first memristive device of a differential pair of memristive devices connected to the neuron circuit, the differential pair of memristive devices including the first memristive device and a second memristive device.
15. The memristive neuromorphic circuit of claim 14 , further comprising:
a differential amplifier connected to the differential pair of memristive devices, the differential amplifier configured to calculate a difference between an output of the first memristive device and an output of the second memristive device.
16. The memristive neuromorphic circuit of claim 14 , wherein
the differential pair of memristive devices is a first differential pair of a plurality of differential pairs of memristive devices, and
the plurality of differential pairs of memristive devices are connected to the neuron circuit.
17. The memristive neuromorphic circuit of claim 13 , further including:
a plurality of crossbar nanowires, wherein
the neuron circuit, the memristive device, and the plurality of crossbar nanowires are connected together as a crossbar circuit.
18. The memristive neuromorphic circuit of claim 13 , wherein
the neuron circuit includes at least one of an input neuron and an output neuron.
19. The memristive neuromorphic circuit of claim 18 , wherein
the memristive device is connected between the input neuron and the output neuron.
20. The memristive neuromorphic circuit of claim 18 , wherein the input neuron, the output neuron, and the memristive device are integrally formed as a single integrated circuit.
21. The method of claim 1 , wherein
the training voltage may vary according the desired conductance change.
22. The memristive neuromorphic circuit of claim 13 , wherein
the training voltage may vary according the desired conductance change.