IP Library Granted Patent US 10,366,013
Granted Patent B2
US 10,366,013 · App. 14/997,026 · Granted Jul 30, 2019

Caching structure for nested preemption

Inventors: Lee McFearin (Plano, TX); Sushma Wokhlu (Frisco, TX); Alan Gatherer (Richardson, TX)
Assignee: Futurewei Technologies, Inc.
G06F12/121G06F12/0804G06F12/0891G06F12/0897G06F12/126G06F12/12G06F2212/1044G06F2212/60
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Quick Facts
Patent No.
US 10,366,013
App. No.
14/997,026
Granted
Jul 30, 2019
Kind
B2
Abstract

The present disclosure relates to a system and method of managing operation of a cache memory. The system and method assign each nested task a level, and each task within a nested level an instance. Using the assigned task levels and instances, the cache management module is able to determine which cache entries to evict from cache when space is needed, and which evicted cache entries to recover upon completion of preempting tasks.

Claims (51)

1. A computing device for nested preemption with a cache replacement policy, comprising:

a cache memory comprising a plurality of cache entries, each cache entry being assigned a nested level of the cache entry, and an instance identifier (ID) at the nested level;

a non-transitory memory storage memory comprising instructions;

one or more processors in communication with the non-transitory memory storage memory, wherein the one or more processors execute the instructions to

receive a new preemptive task assigned a next successive incremental nested level n and assigned a next successive incremental instance ID x of the nested level n, the new preemptive task at level n preempting a task in progress at a nested level m less than n, and

manage operations of the cache memory to evict one of the cache entries and replace the evicted cache entry with a new cache entry for the new preemptive task, wherein the evicted cache entry is based on the nested level and the instance ID of the new preemptive task and of each cache entry such that completed tasks are first evicted and replaced in the cache memory and tasks with an upcoming function call are last evicted and replaced from the cache memory.

2. The computing device of claim 1 , wherein the evicted cache entry is one of:

(a) a cache entry in the cache memory with invalid data;

(b) a cache entry in the cache memory at the nested level higher than n;

(c) a cache entry in the cache memory at the nested level n and with the instance ID different than x;

(d) a cache entry in the cache memory at the nested level lower than n; or

(e) a cache entry in the cache memory at the nested level n and with the instance ID x.

3. The computing device of claim 2 , wherein the one or more processors execute the instructions to select (a) as the evicted cache entry to be replaced before (b)-(e); select (b) as the evicted cache entry to be replaced before (c)-(e); select (c) as the evicted cache entry to be replaced before (d) and (e); and select (d) as the evicted cache entry to be replaced before (e).

4. The computing device of claim 1 , wherein the one or more processors execute the instructions to assign the nested level n and the instance ID x to the new cache entry.

5. The computing device of claim 1 , further comprising a FIFO second level cache memory; and wherein the one or more processors execute the instructions to store the selected cache entry in the FIFO second level cache memory.

6. The computing device of claim 5 , wherein the one or more processors execute the instructions to recover the selected cache entry into the cache memory from the FIFO second level cache memory upon completion of the new preemptive task.

7. A computer-implemented method for nested preemption with a cache replacement policy, the cache memory comprising a plurality of cache entries, each cache entry being assigned a nested level of the cache entry, and an instance identifier (ID) at the nested level, the method comprising:

receiving a preemptive task assigned a next successive incremental nested level n and assigned a next successive incremental instance ID x of the nested level n when performing a first task at a nested level m, wherein n>m;

suspending the first task at the nested level m;

performing the preemptive task assigned the nested level n,

selecting a cache entry based on the nested level and the instance ID of the preemptive task and of each cache entry; and

replacing the selected cache entry with a new cache entry for the preemptive task such that completed tasks are first replaced in the cache memory and tasks with an upcoming function call are last replaced from the cache memory.

8. The method of claim 7 , wherein the evicted cache entry is one of:

(i) a cache entry in the cache memory at a nested level higher than n;

(ii) a cache entry in the cache memory at the nested level n and with the instance ID different than x, and

(iii) a cache entry in the cache memory at a nested level lower than n.

9. The method of claim 8 , wherein the cache entry in (i) is replaced before the cache entry in (ii) and (iii).

10. The method of claim 8 , wherein the cache entry in (ii) is replaced before the cache entry in (iii).

11. The method of claim 8 , wherein the evicted cache entry is: (iv) a cache entry in the cache memory with invalid data or (v) a cache entry in the cache memory at the nested level n and with the instance ID x.

12. A computer-implemented method for nested preemption with a cache replacement policy, the cache memory comprising a plurality of cache entries, each cache entry being assigned a nested level of the cache entry, and an instance identifier (ID) at the nested level, the method comprising:

fetching a selected cache entry from a cache buffer, the selected cache entry fetched from the cache buffer being a cache entry that was evicted from the cache memory and replaced by a preemptive task assigned a next successive incremental nested level n and assigned a next successive incremental instance ID x of the nested level n, wherein the selected cache entry for completed tasks are first evicted from the cache memory and tasks with an upcoming function call are last evicted from the cache memory; and

recovering the evicted cache entry back into the cache memory, wherein the selected cache entry is assigned the next successive incremental nested level n and assigned the next successive incremental instance ID x.

13. The method of claim 12 , wherein the evicted cache entry is the latest cache entry stored in the cache buffer.

14. The method of claim 12 , wherein the evicted cache entry is a cache entry evicted from the cache memory for an uncompleted task.

15. A non-transitory computer-readable medium storing computer instructions for nested preemption with a cache replacement policy, that when executed by one or more processors, cause the one or more processors to perform the steps of:

configure a cache memory comprising plurality of cache entries, wherein each cache entry being assigned a nested level, and each cache entry being assigned an instance identifier (ID) indicating respective tasks at the nested level;

receive a preemptive task assigned a next successive incremental nested level n and assigned a next successive incremental instance ID x of the nested level n when performing a first task at a nested level m, wherein n>m;

suspend the first task at the nested level m;

perform the preemptive task at the nested level n;

select a cache entry based on the nested level and the instance ID of the preemptive task and of each cache entry such that the cache entry for completed tasks are first selected and the cache entry for tasks with an upcoming function call are last selected; and

replace the selected cache entry in the cache memory with a new cache entry for the preemptive task at the nested level n and the instance ID x.

16. The non-transitory computer-readable medium of claim 15 , wherein the cache entry is one of:

(a) a cache entry in the cache memory with invalid data;

(b) a cache entry in the cache memory at the nested level higher than n;

(c) a cache entry in the cache memory at the nested level n and with the instance ID different than x;

(d) a cache entry in the cache memory at the nested level lower than n; or

(e) a cache entry in the cache memory at the nested level n and with the instance ID x.

17. The non-transitory computer-readable medium of claim 15 , further comprising the steps of:

recover an evicted cache entry back into the cache memory from a buffer upon completion of a task, the evicted cache entry being a cache entry that was previously evicted from the cache memory and has a highest level pending function call.

18. The non-transitory computer-readable medium of claim 17 , wherein the evicted cache entry is added to a FIFO buffer.

19. The non-transitory computer-readable medium of claim 17 , wherein the evicted cache entry being the selected cache entry replaced by the new cache entry for the preemptive task.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2016
From: MCFEARIN, LEE; WOKHLU, SUSHMA; GATHERER, ALAN
To: FUTUREWEI TECHNOLOGIES, INC.
Reel/Frame 037545/0487 →
Continuity (1)
Related Publication 20170206173A1 · Jul 20, 2017
Cited By (1)
US 12,536,108