IP Library Granted Patent US 10,366,753
Granted Patent B2
US 10,366,753 · App. 15/999,694 · Granted Jul 30, 2019

Correlated electron switch programmable fabric

Inventors: Lucian Shifren (San Jose, CA); Greg Yeric (Austin, TX); Saurabh Sinha (Austin, TX); Brian Cline (Austin, TX); Vikas Chandra (San Jose, CA)
Assignee: Arm Limited
G11C13/0069G11C13/0002G11C13/004H01L27/2409H01L27/2481G11C2213/72H01L27/2436H01L45/04H01L45/1233H01L45/14H01L45/146H01L45/147
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,366,753
App. No.
15/999,694
Granted
Jul 30, 2019
Kind
B2
Abstract

Subject matter disclosed herein may relate to programmable fabrics including correlated electron switch devices.

Claims (22)

1. A method, comprising:

selectively connecting or disconnecting one or more portions of an integrated circuit to one or more other portions of the integrated circuit at least in part by selectively applying a programming voltage to one or more correlated electron switch devices to cause a transition in the one or more correlated electron switch devices from a first impedance state to a second impedance state, wherein the one or more correlated electron switch devices are respectively positioned between one or more electrodes of a first metallization layer and one or more electrodes of a second metallization layer.

2. The method of claim 1 , wherein the selectively connecting or disconnecting the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit comprises compensating for manufacturing errors in the integrated circuit.

3. The method of claim 1 , wherein the selectively connecting or disconnecting the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit comprises compensating for design errors in the integrated circuit.

4. The method of claim 1 , wherein the selectively connecting or disconnecting the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit comprises reducing power consumption in the integrated circuit at least in part by selectively disconnecting a supply voltage from the one or more portions of the integrated circuit.

5. The method of claim 1 , wherein the selectively connecting or disconnecting the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit comprises adjusting clock skew between specified portions of the integrated circuit.

6. The method of claim 5 , wherein the integrated circuit comprises a programmable fabric including the one or more electrodes of the first metallization layer, the one or more electrodes of the second metallization layer, and the one or more correlated electron switch devices positioned between the one or more electrodes of the first metallization layer and the one or more electrodes of the second metallization layer.

7. The method of claim 6 , wherein the programmable fabric further includes one or more electrodes of a third metallization layer and one or more other correlated electron switch devices positioned between the one or more electrodes of the second metallization layer and the one or more electrodes of the third metallization layer.

8. The method of claim 7 , wherein the programmable fabric comprises a cross-point array, wherein the one or more electrodes of the first metallization layer includes a first plurality of electrodes aligned in a first direction, wherein the one or more electrodes of the second metallization layer includes a second plurality of electrodes aligned in a second direction orthogonal to the first direction, wherein the one or more electrodes of the third metallization layer includes a third plurality of electrodes aligned in the first direction.

9. The method of claim 8 , wherein the one or more correlated electron switch devices are individually positioned at respective intersections of individual electrodes of the first plurality of electrodes and individual electrodes of the second plurality of electrodes, and wherein the one or more other correlated electron switch devices are individually positioned at respective intersections of the individual electrodes of the second plurality of electrodes and individual electrodes of the third plurality of electrodes.

10. The method of claim 9 , wherein the programmable fabric includes a plurality of access devices respectively positioned at the one or more intersections of the individual electrodes of the first plurality of electrodes and the individual electrodes of the second plurality of electrodes, and further respectively positioned at the one or more intersections of the individual electrodes of the second plurality of electrodes and the individual electrodes of the third plurality of electrodes.

11. A circuit device, comprising:

one or more correlated electron switch devices respectively positioned between one or more electrodes of a first metallization layer and one or more electrodes of a second metallization layer, wherein the one or more correlated electron switch devices selectively connect or disconnect one or more portions of an integrated circuit to one or more other portions of the integrated circuit via one or more transitions in the one or more correlated electron switch devices from a first impedance state to a second impedance state responsive to an applied programming voltage.

12. The circuit device of claim 11 , wherein the one or more correlated electron switch devices to selectively connect or disconnect the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit to compensate for manufacturing errors in the integrated circuit.

13. The circuit device of claim 11 , wherein the one or more correlated electron switch devices to selectively connect or disconnect the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit to compensate for design errors in the integrated circuit.

14. The circuit device of claim 11 , wherein the one or more correlated electron switch devices to selectively connect or disconnect the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit to reduce power consumption in the integrated circuit at least in part via selective disconnection of a supply voltage from the one or more portions of the integrated circuit.

15. The circuit device of claim 11 , wherein the one or more correlated electron switch devices to selectively connect or disconnect the one or more portions of the integrated circuit to the one or more other portions of the integrated circuit to adjust clock skew between specified portions of the integrated circuit.

16. The circuit device of claim 15 , wherein the one or more electrodes of the first metallization layer, the one or more electrodes of the second metallization layer, and the one or more correlated electron switch devices positioned between the one or more electrodes of the first metallization layer and the one or more electrodes of the second metallization layer comprise a programmable fabric.

17. The circuit device of claim 16 , wherein the programmable fabric further includes one or more electrodes of a third metallization layer and one or more other correlated electron switch devices positioned between the one or more electrodes of the second metallization layer and the one or more electrodes of the third metallization layer.

18. The circuit device of claim 17 , wherein the programmable fabric comprises a cross-point array, wherein the one or more electrodes of the first metallization layer includes a first plurality of electrodes aligned in a first direction, wherein the one or more electrodes of the second metallization layer includes a second plurality of electrodes aligned in a second direction orthogonal to the first direction, wherein the one or more electrodes of the third metallization layer includes a third plurality of electrodes aligned in the first direction.

19. The circuit device of claim 18 , wherein the one or more correlated electron switch devices are individually positioned at respective intersections of individual electrodes of the first plurality of electrodes and individual electrodes of the second plurality of electrodes, and wherein the one or more other correlated electron switch devices are individually positioned at respective intersections of the individual electrodes of the second plurality of electrodes and individual electrodes of the third plurality of electrodes.

20. The circuit device of claim 19 , wherein the programmable fabric includes a plurality of access devices respectively positioned at the one or more intersections of the individual electrodes of the first plurality of electrodes and the individual electrodes of the second plurality of electrodes, and further respectively positioned at the one or more intersections of the individual electrodes of the second plurality of electrodes and the individual electrodes of the third plurality of electrodes.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2020
From: ARM LIMITED
To: CERFE LABS, INC.
Reel/Frame 054297/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2019
From: SHIFREN, LUCIAN; YERIC, GREG; SINHA, SAURABH; CLINE, BRIAN; CHANDRA, VIKAS
To: ARM LIMITED
Reel/Frame 047934/0068 →
Continuity (2)
Continuation 14848129 · Sep 8, 2015
Related Publication 20190027216A1 · Jan 24, 2019