IP Library Granted Patent US 10,410,945
Granted Patent B2
US 10,410,945 · App. 15/554,706 · Granted Sep 10, 2019

Semiconductor device

Inventor: Akitoyo Konno (Tokyo, JP)
Assignee: HITACHI, LTD.
H01L23/36H01L23/3735H01L23/48H01L24/16H01L24/37H01L24/40H01L25/07H01L25/072H01L25/18H01L2224/32225H01L2224/32245H01L2224/33181H01L2224/40225H01L2224/48091H01L2224/48227H01L2224/73215H01L2224/73265H01L2224/92147H01L2224/92247H01L2924/00014H01L2924/13091
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Quick Facts
Patent No.
US 10,410,945
App. No.
15/554,706
Granted
Sep 10, 2019
Kind
B2
Abstract

Provided is a semiconductor device with high reliability. In order to solve the above problems, according to the present invention, the semiconductor device includes a heat dissipating substrate, an insulating substrate arranged on the heat dissipating substrate and having a wiring layer, a plurality of semiconductor elements arranged on the insulating substrate, a conductive block electrically connected to a front surface electrode of the semiconductor element, and a terminal electrode, in which the conductive block has a convex portion, and the convex portion is bonded to the insulating substrate.

Claims (23)

1. A semiconductor device comprising:

a terminal electrode;

a heat dissipating substrate;

an insulating substrate arranged on the heat dissipating substrate and including a wiring layer;

a plurality of semiconductor switching elements arranged on the insulating substrate; and

a conductive block electrically connected to a front surface electrode of the semiconductor switching element,

wherein the conductive block has a convex portion,

wherein the convex portion is bonded to the insulating substrate,

wherein the conductive block is bonded to each of the plurality of semiconductor switching elements, and

wherein the plurality of semiconductor switching elements are arranged to be substantially equally spaced with respect to a bonding portion between the convex portion of the conductive block and the terminal electrode.

2. The semiconductor device according to claim 1 , wherein the convex portion is bonded on a wiring layer of the same node as the front surface electrode bonded to the conductive block.

3. The semiconductor device according to claim 1 , wherein an area of a bonding surface between the conductive block and the insulating substrate is larger than an area of the semiconductor switching element.

4. The semiconductor device according to claim 1 , wherein a distance between the convex portion and the semiconductor switching element is 5 mm or less.

5. The semiconductor device according to claim 1 , wherein the conductive block is bonded to a front surface electrode of the semiconductor switching element through a conductive plate.

6. The semiconductor device according to claim 5 , wherein a thermal expansion coefficient of the conductive plate is larger than a thermal expansion coefficient of the semiconductor switching element and smaller than a thermal expansion coefficient of the conductive block.

7. The semiconductor device according to claim 5 , wherein at least one of the front surface electrode of the semiconductor switching element and the conductive block, the conductive block and the wiring layer of the insulating substrate, the front surface electrode of the semiconductor switching element and the conductive plate, and the wiring layer of the insulating substrate and the conductive plate is bonded through a sintered metal layer.

8. The semiconductor device according to claim 1 , wherein the insulating substrate and the heat dissipating substrate are bonded through a sintered metal layer.

9. The semiconductor device according to claim 8 , wherein the sintered metal layer contains copper.

10. The semiconductor device according to claim 8 , wherein the insulating substrate and the heat dissipating substrate are intermittently bonded by a sintered metal body.

11. The semiconductor device according to claim 1 , wherein at least one of the front surface electrode of the semiconductor switching element and the conductive block, and the conductive block and the wiring layer of the insulating substrate is bonded through a sintered metal layer.

12. The semiconductor device according to claim 1 , wherein the heat dissipating substrate is made of copper.

13. The semiconductor device according to claim 12 , wherein the heat dissipating substrate is formed in a fin shape.

14. The semiconductor device according to claim 1 , wherein the plurality of semiconductor switching elements include three or more semiconductor switching elements that are arranged in a ring shape.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2017
From: KONNO, AKITOYO
To: HITACHI, LTD.
Reel/Frame 043453/0150 →
Priority Claims (1)
JP 2015-058918 · Mar 23, 2015 · national
Continuity (1)
Related Publication 20180240728A1 · Aug 23, 2018